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Tue, 9 Jul 2024 11:43:48 GMT Received: from smtpav07.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E60672004B; Tue, 9 Jul 2024 11:43:45 +0000 (GMT) Received: from smtpav07.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9E19F20040; Tue, 9 Jul 2024 11:43:44 +0000 (GMT) Received: from localhost.in.ibm.com (unknown [9.199.192.140]) by smtpav07.fra02v.mail.ibm.com (Postfix) with ESMTP; Tue, 9 Jul 2024 11:43:44 +0000 (GMT) From: Chinmay Rath To: qemu-ppc@nongnu.org Cc: qemu-devel@nongnu.org, npiggin@gmail.com, danielhb413@gmail.com, richard.henderson@linaro.org, harshpb@linux.ibm.com Subject: [PATCH v3 0/3] target/ppc: Update vector insns to use 128 bit Date: Tue, 9 Jul 2024 17:13:38 +0530 Message-Id: <20240709114341.152175-1-rathc@linux.ibm.com> X-Mailer: git-send-email 2.39.3 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: DrAaioYPL5-JsXDwJZncYAehf2Qt8zLa X-Proofpoint-ORIG-GUID: 3QjbmfMy-Yd25Yx2zjFFT4zIC85kfnVJ X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-09_02,2024-07-08_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 malwarescore=0 suspectscore=0 clxscore=1015 bulkscore=0 mlxscore=0 lowpriorityscore=0 mlxlogscore=830 adultscore=0 impostorscore=0 phishscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407090077 Received-SPF: pass client-ip=148.163.158.5; envelope-from=rathc@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Updating a bunch of VMX and VSX storage access instructions to use tcg_gen_qemu_ld/st_i128 instead of using tcg_gen_qemu_ld/st_i64 in succession; as suggested by Richard, in my decodetree patches. Plus some minor clean-ups to facilitate the above in case of VMX insns. Change log: v3 : Rectified EA increment from 8 to 16 for paired insns in patch 3/3, as pointed by Richard. Retained his 'Reviewed-by' for all patches, after the correction. v2 : Applied IFALIGN_PAIR memop changes in patches 2/3 and 3/3, based on review comments by Richard. https://lore.kernel.org/qemu-devel/20240630120157.259233-1-rathc@linux.ibm.com/ v3 : https://lore.kernel.org/qemu-devel/20240621114604.868415-1-rathc@linux.ibm.com/ Chinmay Rath (3): target/ppc: Move get/set_avr64 functions to vmx-impl.c.inc. target/ppc: Update VMX storage access insns to use tcg_gen_qemu_ld/st_i128. target/ppc : Update VSX storage access insns to use tcg_gen_qemu _ld/st_i128. target/ppc/translate.c | 10 ---- target/ppc/translate/vmx-impl.c.inc | 52 +++++++++++--------- target/ppc/translate/vsx-impl.c.inc | 74 +++++++++++++---------------- 3 files changed, 63 insertions(+), 73 deletions(-)