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Fri, 21 Jun 2024 11:46:18 GMT Received: from smtpav01.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2053720040; Fri, 21 Jun 2024 11:46:16 +0000 (GMT) Received: from smtpav01.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6E9FA20043; Fri, 21 Jun 2024 11:46:14 +0000 (GMT) Received: from localhost.localdomain.com (unknown [9.171.38.80]) by smtpav01.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 21 Jun 2024 11:46:14 +0000 (GMT) From: Chinmay Rath To: qemu-ppc@nongnu.org Cc: qemu-devel@nongnu.org, npiggin@gmail.com, danielhb413@gmail.com, richard.henderson@linaro.org, harshpb@linux.ibm.com Subject: [PATCH 0/3] target/ppc: Update vector insns to use 128 bit Date: Fri, 21 Jun 2024 17:16:01 +0530 Message-Id: <20240621114604.868415-1-rathc@linux.ibm.com> X-Mailer: git-send-email 2.39.3 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: yBYL2FbjQgQrjTiVM06IEQnNYm6pY6XK X-Proofpoint-ORIG-GUID: hNuKZmLRr9IRvRXke-bnAqLMUid9K_DH X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-21_04,2024-06-21_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=671 spamscore=0 clxscore=1011 bulkscore=0 impostorscore=0 phishscore=0 priorityscore=1501 mlxscore=0 lowpriorityscore=0 adultscore=0 malwarescore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2406210084 Received-SPF: pass client-ip=148.163.158.5; envelope-from=rathc@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Updating a bunch of VMX and VSX storage access instructions to use tcg_gen_qemu_ld/st_i128 instead of using tcg_gen_qemu_ld/st_i64 in succession; as suggested by Richard, in my decodetree patches. Plus some minor clean-ups to facilitate the above in case of VMX insns. Chinmay Rath (3): target/ppc: Move get/set_avr64 functions to vmx-impl.c.inc. target/ppc: Update VMX storage access insns to use tcg_gen_qemu_ld/st_i128. target/ppc : Update VSX storage access insns to use tcg_gen_qemu _ld/st_i128. target/ppc/translate.c | 10 ----- target/ppc/translate/vmx-impl.c.inc | 50 +++++++++++---------- target/ppc/translate/vsx-impl.c.inc | 68 ++++++++++++----------------- 3 files changed, 57 insertions(+), 71 deletions(-)