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Tue, 20 Feb 2024 11:26:13 -0800 (PST) Received: from grind.dc1.ventanamicro.com ([177.94.15.159]) by smtp.gmail.com with ESMTPSA id i73-20020a636d4c000000b005b458aa0541sm6943005pgc.15.2024.02.20.11.26.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Feb 2024 11:26:13 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, richard.henderson@linaro.org, max.chou@sifive.com, Daniel Henrique Barboza Subject: [PATCH v3 0/5] riscv: set vstart_eq_zero on mark_vs_dirty Date: Tue, 20 Feb 2024 16:26:02 -0300 Message-ID: <20240220192607.141880-1-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.2 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::d2c; envelope-from=dbarboza@ventanamicro.com; helo=mail-io1-xd2c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Hi, In this new version I decided to scrap patch 3 from v2 and added a patch that Ivan Klokov sent back in December [1]. In that patch Ivan was already doing things that Richard suggested to be done in patch 3 of v2. This is done in patch 5. Patches 1 and 2 were suggestions from Richard that I'm adding as cleanup. Patch 2 in particular helped to clean up quite a bit of code. Patch 3 is a fix in GEN_VEXT_VSLIDEUP_VX() that I caught while doing code inspection to assert that all helpers were setting env->vstart = 0 in the end. Patch 4 is patch 2 from v2 without any changes. Patches based on alistair/riscv-to-apply.next. Changes from v2: - patches 1 and 3 from v2 were dropped, patch 2 from v2 is now patch 4 - patch 1: new - dirty vs state before stores - patch 2: new - remove redundant conditionals - patch 3: new - assign env->vstart = 0 in GEN_VEXT_VSLIDEUP_VX() - patch 5: taken from [1] with the following changes: - fixed conflicts with alistair/riscv-to-apply.next - changed "finalize_rrv_inst" instances to "finalize_rvv_inst" to fix trans_rvvk.c.inc build - set_vstart_eq_zero() removed; finalize_rvv_inst() will do a direct ctx->vstart_eq_zero = true instead; - finalize_rvv_inst() is removed from the #ifdef block since it's now relevant to linux-user - v2 link: https://lore.kernel.org/qemu-riscv/20240216135719.1034289-1-dbarboza@ventanamicro.com/ Daniel Henrique Barboza (4): trans_rvv.c.inc: mark_vs_dirty() before stores target/riscv: remove 'over' brconds from vector trans target/riscv/vector_helper.c: set vstart = 0 in GEN_VEXT_VSLIDEUP_VX() trans_rvv.c.inc: remove redundant mark_vs_dirty() calls Ivan Klokov (1): target/riscv: Clear vstart_qe_zero flag target/riscv/insn_trans/trans_rvbf16.c.inc | 6 +- target/riscv/insn_trans/trans_rvv.c.inc | 224 +++++---------------- target/riscv/insn_trans/trans_rvvk.c.inc | 30 +-- target/riscv/translate.c | 6 + target/riscv/vector_helper.c | 1 + 5 files changed, 70 insertions(+), 197 deletions(-)