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([179.193.10.161]) by smtp.gmail.com with ESMTPSA id k1-20020a81ff01000000b005add997ae53sm1272802ywn.81.2023.10.31.13.39.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 31 Oct 2023 13:39:21 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v7 00/16] rv64i CPU, RVA22U64 profile support Date: Tue, 31 Oct 2023 17:39:00 -0300 Message-ID: <20231031203916.197332-1-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::112c; envelope-from=dbarboza@ventanamicro.com; helo=mail-yw1-x112c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Hi, As discussed in v6, all our problems with the profile implementation cames from the rv64 CPU and how to deal with its defaults. Enabling a profile on top of it is straightforward, but disabling it (either via a script trying to undo a profile enablement, or users doing something silly) makes things complicated - disabling all the mandatory extensions will overwrite the CPU defaults, but doing nothing is weird considering how QEMU options work. And therein lies the rub: we didn't have any other way of consuming profiles, so we were stuck dancing around rv64 defaults and what to do with them. In this v7 we're adding a new CPU called 'rv64i'. This is a new type of CPUs, called 'bare', that doesn't inherit any defaults and allows users to enable/disable extensions at will. This CPU is implementing bare RV64I for a reason: this is the mandatory ISA for profiles support. All the design around profile support is now made on top of how rv64i works. Other non-vendor CPUs (like rv64) can still use profiles, but now we're not concerned about what happens if an user does '-cpu rv64,rva22u64=false'. In short, we recommend using profiles with rv64i but we won't forbid using it with rv64 (in particular because stock rv64 does not implement rva22u64, which is surprising giving it has a lot of defaults ...). Patches 1, 2 and 3 implements rv64i. Another noticeable change was made in patches 15 and 16. We're now exposing the profile flag to all CPUs. In the end a profile is just a set of mandatory extensions and conditions that must be met. If the conditions are met we should enable the flag, regardless of user input. This is done by changes in patch 15. Patch 16 changes query-cpu-model-expansion to show profile flags. Patches based on top of Alistair's riscv-to-apply.next. Patches missing acks: 1, 2, 3, 5, 15, 16 Changes from v6: - patch 1 (new): - create vendor CPU type - patch 2 (new): - check for 'if vendorCPU' instead of 'if !genericCPU' - patch 3 (new): - add rv64i CPU - patch 5 (former patch 2 from v6): - drop the CB_DEF_VALUE define - patch 6 (fomer patch 3 from v6): - mention cbop block size in commit msg - patch 9 (former patch 6 from v6): - removed the "no-op" when disabling a profile - rewrote the commit msg to reflect that the design is made on top of the rv64i CPU - patch 12 (fomer patch 9 from v6): - do not disable RVI when disabling a profile - patch 15 (patch 12 from v6): - previous acks revoked due to the amount of changes made - disable profile flags if there are missing mandatory extensions during finalize() - enable profile flags if all its preconditions are met during finalize() - patch 16 (new): - add profile flags to query-cpu-model-expansion - v6 link: https://lore.kernel.org/qemu-riscv/20231028085427.707060-1-dbarboza@ventanamicro.com/ Daniel Henrique Barboza (16): target/riscv: create TYPE_RISCV_VENDOR_CPU target/riscv/tcg: do not use "!generic" CPU checks target/riscv: add rv64i CPU target/riscv: add zicbop extension flag target/riscv/tcg: add 'zic64b' support riscv-qmp-cmds.c: expose named features in cpu_model_expansion target/riscv: add rva22u64 profile definition target/riscv/kvm: add 'rva22u64' flag as unavailable target/riscv/tcg: add user flag for profile support target/riscv/tcg: add MISA user options hash target/riscv/tcg: add riscv_cpu_write_misa_bit() target/riscv/tcg: handle profile MISA bits target/riscv/tcg: add hash table insert helpers target/riscv/tcg: honor user choice for G MISA bits target/riscv/tcg: validate profiles during finalize riscv-qmp-cmds.c: add profile flags in cpu-model-expansion hw/riscv/virt.c | 5 + target/riscv/cpu-qom.h | 3 + target/riscv/cpu.c | 96 ++++++++++- target/riscv/cpu.h | 13 ++ target/riscv/cpu_cfg.h | 3 + target/riscv/kvm/kvm-cpu.c | 7 +- target/riscv/riscv-qmp-cmds.c | 44 ++++- target/riscv/tcg/tcg-cpu.c | 301 +++++++++++++++++++++++++++++----- 8 files changed, 412 insertions(+), 60 deletions(-)