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[78.94.0.52]) by smtp.gmail.com with ESMTPSA id j17-20020a05600c489100b0040776008abdsm1455303wmp.40.2023.10.18.04.52.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 04:52:34 -0700 (PDT) From: Patrick Rudolph To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com, mst@redhat.com, imammedo@redhat.com, anisinha@redhat.com, marcel.apfelbaum@gmail.com, Patrick Rudolph Subject: [PATCH 0/3] hw/i386: Add MTD controller on ICH9 Date: Wed, 18 Oct 2023 13:52:28 +0200 Message-ID: <20231018115231.3547102-1-patrick.rudolph@9elements.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=patrick.rudolph@9elements.com; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Wed, 18 Oct 2023 08:45:43 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This series implements a feature complete MTD SPI flash controller as found on real ICH9, adds cache coherent BIOS MMAPing and implements a few SMM bits to allow x86 firmware build for real ICH9 to operate on the flash controller to store (UEFI) variables or do firmware updates. Patrick Rudolph (3): hw/isa/ich9: Add SPI controller hw/isa/lpc_ich9: Implement SMI_STS for APMC hw/i386/pc_sysfw: Do not create BIOS region if MTD is present hw/acpi/ich9.c | 5 + hw/acpi/ich9_tco.c | 5 + hw/i386/pc_sysfw.c | 6 + hw/isa/Kconfig | 2 + hw/isa/lpc_ich9.c | 4 + hw/isa/meson.build | 2 +- hw/isa/spi_ich9.c | 448 ++++++++++++++++++++++++++++++ include/hw/southbridge/ich9.h | 6 + include/hw/southbridge/ich9_spi.h | 80 ++++++ 9 files changed, 557 insertions(+), 1 deletion(-) create mode 100644 hw/isa/spi_ich9.c create mode 100644 include/hw/southbridge/ich9_spi.h