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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id n7-20020a62e507000000b00693411c6c3csm13687926pff.39.2023.10.13.10.10.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Oct 2023 10:10:13 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: jniethe5@gmail.com Subject: [PATCH v4 00/13] tcg/ppc: direct branching, power9, power10 Date: Fri, 13 Oct 2023 10:09:59 -0700 Message-Id: <20231013171012.122980-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::433; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Build on Jordan's patch to allow direct branching and USE_REG_TB to co-exist. Use the power9 addpcis wherever pc-relative addrs might be handy. Merge in my power10 patches for prefixed insns. Finish up with an RFC to disable TCG_REG_TB for power9+, when pc-relative code sequences exist. I've only lightly tested this, and it seems to increase code size by a few insns per TB. It really depends on how much we end up using the constant pool. Changes for v4: * Fix tcg_out_addpcis. * Drop RFC from the final patch. Jordan's testing suggests that pc-relative addressing is slightly better than tb-relative. I can imagine that addpcis+ld might be fused in the pipeline to an absolute 64-bit address, and so has no real cost. r~ Jordan Niethe (1): tcg/ppc: Enable direct branching tcg_out_goto_tb with TCG_REG_TB Richard Henderson (12): tcg/ppc: Untabify tcg-target.c.inc tcg/ppc: Reinterpret tb-relative to TB+4 tcg/ppc: Use ADDPCIS in tcg_out_tb_start tcg/ppc: Use ADDPCIS in tcg_out_movi_int tcg/ppc: Use ADDPCIS for the constant pool tcg/ppc: Use ADDPCIS in tcg_out_goto_tb tcg/ppc: Use PADDI in tcg_out_movi tcg/ppc: Use prefixed instructions in tcg_out_mem_long tcg/ppc: Use PLD in tcg_out_movi for constant pool tcg/ppc: Use prefixed instructions in tcg_out_dupi_vec tcg/ppc: Use PLD in tcg_out_goto_tb tcg/ppc: Disable TCG_REG_TB for Power9/Power10 tcg/ppc/tcg-target.c.inc | 277 +++++++++++++++++++++++++++++++++------ 1 file changed, 236 insertions(+), 41 deletions(-)