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([177.94.42.59]) by smtp.gmail.com with ESMTPSA id l6-20020a170902f68600b001c41e1e9ca7sm11386010plg.215.2023.09.26.12.49.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Sep 2023 12:49:58 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, Daniel Henrique Barboza Subject: [PATCH 0/6] riscv: RVA22U64 profile support Date: Tue, 26 Sep 2023 16:49:44 -0300 Message-ID: <20230926194951.183767-1-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=dbarboza@ventanamicro.com; helo=mail-pf1-x436.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Based-on: 20230926183109.165878-1-dbarboza@ventanamicro.com ("[PATCH 0/2] riscv: add extension properties for all cpus") Hi, These patches implements the base profile support for qemu-riscv and the first profile, RVA22U64. As discussed in this thread [1] we're aiming for a flag that enables all mandatory extensions of a profile. Optional extensions were left behind and must be enabled by hand if desired. Since this is the first profile we're adding, we'll need to add the base framework as well. The RVA22U64 profile was chosen because qemu-riscv implements all its extensions, both mandatory and optional. That includes 'zicntr' and 'zihpm', which we support for awhile but aren't adverting to userspace. Other design decisions made: - disabling a profile flag does nothing, i.e. we won't mass disable mandatory extensions of the rva22U64 profile if the user sets rva22u64=false; - profile support for vendor CPUs consists into checking if the CPU happens to have the mandatory extensions required for it. In case it doesn't we'll error out. This is done to follow the same prerogative we always had of not allowing extensions being enabled for vendor CPUs; - the KVM driver doesn't support profiles. In theory we could apply the same logic as for the vendor CPUs, but KVM has a long way to go before that becomes a factor. We'll revisit this decision when KVM is able to support at least one profile. Patch 5 ("enable profile support for vendor CPUs") needs the following series to be applied beforehand: "[PATCH 0/2] riscv: add extension properties for all cpus" Otherwise we won't be able to add the profile flag to vendor CPUs. [1] https://lore.kernel.org/qemu-riscv/35a847a1-2720-14ab-61b0-c72d77d5f43b@ventanamicro.com/ Daniel Henrique Barboza (6): target/riscv/cpu.c: add zicntr extension flag target/riscv/cpu.c: add zihpm extension flag target/riscv: add rva22u64 profile definition target/riscv/tcg: implement rva22u64 profile target/riscv/tcg-cpu.c: enable profile support for vendor CPUs target/riscv/kvm: add 'rva22u64' flag as unavailable target/riscv/cpu.c | 25 ++++++++++ target/riscv/cpu.h | 10 ++++ target/riscv/cpu_cfg.h | 2 + target/riscv/kvm/kvm-cpu.c | 5 +- target/riscv/tcg/tcg-cpu.c | 98 ++++++++++++++++++++++++++++++++++++++ 5 files changed, 139 insertions(+), 1 deletion(-)