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client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C Received: from SATLEXMB03.amd.com (165.204.84.17) by CO1PEPF000044F1.mail.protection.outlook.com (10.167.241.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6745.16 via Frontend Transport; Thu, 31 Aug 2023 16:25:13 +0000 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Thu, 31 Aug 2023 11:25:12 -0500 Received: from localhost.localdomain (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2507.27 via Frontend Transport; Thu, 31 Aug 2023 11:25:11 -0500 From: Francisco Iglesias To: CC: , , , , , , , Subject: [PATCH v4 0/8] Xilinx Versal CFI support Date: Thu, 31 Aug 2023 18:24:57 +0200 Message-ID: <20230831162505.30399-1-francisco.iglesias@amd.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044F1:EE_|LV2PR12MB5726:EE_ X-MS-Office365-Filtering-Correlation-Id: 33ac4fae-c7d9-4098-f2f4-08dbaa3edadb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Aug 2023 16:25:13.8036 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 33ac4fae-c7d9-4098-f2f4-08dbaa3edadb X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F1.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR12MB5726 Received-SPF: softfail client-ip=2a01:111:f400:7eaa::60d; envelope-from=francisco.iglesias@amd.com; helo=NAM11-DM6-obe.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Hi, This series adds support for the Configuration Frame Unit (CFU) and the Configuration Frame controllers (CFRAME) to the Xilinx Versal machine ([1], chapter 21) for emulaing bitstream loading and readback. The series starts by introducing the Xilinx CFI interface that is thereafter used by the Xilinx CFU components, the Xilinx CFRAME and Xilinx CFRAME broadcast models for transfering CFI packets between each other. Thereafter a model of the CFU_APB, CFU_FDRO and CFU_SFR are introduced and also models of the CFRAME controller and CFRAME broadcast controller. The series thereafter ends with connecting the models to Xilinx Versal machine. Best regards, Francisco Iglesias References: [1] https://docs.xilinx.com/r/en-US/am011-versal-acap-trm/PSM-Local-Registers Changelog: v3->v4: [PATCH 5] * Swap to pop out the fifo32 data instead of using memcpy * Use g_tree_nnodes instead of g_tree_height * Take reference before g_tree_destroy (for keeping the GTree around) * Remove stray whitespace (in cframe_reg_init before g_free) v2->v3: [PATCH 5] * Swap to store the CFrames in a GTree instead of GArray * Rename new_f to new_f_data and also add it to the vmstate * Removed unnecessary 'switch' braces in cframe_reg_cfi_transfer_packet * Correct the reset of new_f_data and the cframes GTree v1->v2: [PATCH 2] * Use KiB when defining KEYHOLE_STREAM_4K/KEYHOLE_STREAM_256K * Updated to be able to share wfifo code [PATCH 3] * Swap to use Fifo32 instead of GArray in the CFU_FDRO model * Add device reset to the CFU_FDRO model [PATCH 4] * Add device reset to the CFU_SFR model [PATCH 5] * Use KiB when defining KEYHOLE_STREAM_4K * Add comma after CFRAME_CMD_DLPARK * Remove backwards compatibility comment (and the 'cfu' alias propname for cfg.cfu_fdro) * Use Fifo32 inside the XlnxCFrame structure * Reworked cframes_reg_pre_save / cframes_reg_post_load [PATCH 6] * Add device reset to the CFrame broadcast reg model [PATCH 8] * Switch to use g_autofree instead of explicit g_free Francisco Iglesias (8): hw/misc: Introduce the Xilinx CFI interface hw/misc: Introduce a model of Xilinx Versal's CFU_APB hw/misc/xlnx-versal-cfu: Introduce a model of Xilinx Versal CFU_FDRO hw/misc/xlnx-versal-cfu: Introduce a model of Xilinx Versal's CFU_SFR hw/misc: Introduce a model of Xilinx Versal's CFRAME_REG hw/misc: Introduce a model of Xilinx Versal's CFRAME_BCAST_REG hw/arm/xlnx-versal: Connect the CFU_APB, CFU_FDRO and CFU_SFR hw/arm/versal: Connect the CFRAME_REG and CFRAME_BCAST_REG MAINTAINERS | 10 + hw/arm/xlnx-versal.c | 155 +++- hw/misc/meson.build | 3 + hw/misc/xlnx-cfi-if.c | 34 + hw/misc/xlnx-versal-cframe-reg.c | 858 +++++++++++++++++++++++ hw/misc/xlnx-versal-cfu.c | 563 +++++++++++++++ include/hw/arm/xlnx-versal.h | 85 +++ include/hw/misc/xlnx-cfi-if.h | 59 ++ include/hw/misc/xlnx-versal-cframe-reg.h | 303 ++++++++ include/hw/misc/xlnx-versal-cfu.h | 258 +++++++ 10 files changed, 2327 insertions(+), 1 deletion(-) create mode 100644 hw/misc/xlnx-cfi-if.c create mode 100644 hw/misc/xlnx-versal-cframe-reg.c create mode 100644 hw/misc/xlnx-versal-cfu.c create mode 100644 include/hw/misc/xlnx-cfi-if.h create mode 100644 include/hw/misc/xlnx-versal-cframe-reg.h create mode 100644 include/hw/misc/xlnx-versal-cfu.h