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[v2,0/8] riscv: detecting user choice in TCG extensions

Message ID 20230815203635.400179-1-dbarboza@ventanamicro.com
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Series riscv: detecting user choice in TCG extensions | expand

Message

Daniel Henrique Barboza Aug. 15, 2023, 8:36 p.m. UTC 
Hi,

This new version is a rebase on top of the new version of the 'max' CPU
series:

[PATCH v7 00/12] riscv: add 'max' CPU, deprecate 'any'

The changes made from v6 to v7 conflicted with the code from v1 of this
series.

No changes made aside from trivial conflicts.

All patches acked.

Changes from v1:
- rebased on top of "[PATCH v7 00/12] riscv: add 'max' CPU, deprecate
  'any'"
- v1 link: https://lore.kernel.org/qemu-riscv/20230728131520.110394-1-dbarboza@ventanamicro.com/


Daniel Henrique Barboza (8):
  target/riscv/cpu.c: use offset in isa_ext_is_enabled/update_enabled
  target/riscv: make CPUCFG() macro public
  target/riscv/cpu.c: introduce cpu_cfg_ext_auto_update()
  target/riscv/cpu.c: use cpu_cfg_ext_auto_update() during realize()
  target/riscv/cpu.c: introduce RISCVCPUMultiExtConfig
  target/riscv: use isa_ext_update_enabled() in
    init_max_cpu_extensions()
  target/riscv/cpu.c: honor user choice in cpu_cfg_ext_auto_update()
  target/riscv/cpu.c: consider user option with RVG

 target/riscv/cpu.c | 400 +++++++++++++++++++++++++++++----------------
 target/riscv/cpu.h |   2 +
 target/riscv/kvm.c |   8 +-
 3 files changed, 266 insertions(+), 144 deletions(-)