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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f3-20020a0560001b0300b0030e52d4c1bcsm13687423wrz.71.2023.07.24.10.43.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Jul 2023 10:43:37 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH for-8.2 0/3] arm: Use correct number of MPU regions on mps2-tz boards Date: Mon, 24 Jul 2023 18:43:32 +0100 Message-Id: <20230724174335.2150499-1-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patchseries resolves issue https://gitlab.com/qemu-project/qemu/-/issues/1772 which is a report that we don't implement the correct number of MPU regions on our MPS2/MPS3 boards. Ideally guest software ought not to care since (a) it can find out the number of regions by looking at the MPU_TYPE register and (b) if it wanted 8 MPU regions it can just ignore the 8 extra ones. However, Zephyr at least seems both to hardcode this and to care. Patch 1 cleans up a bug in target/arm code that meant that we were accidentally not exposing the pmsav7-dregion on v8M CPUs. Patches 2 and 3 then define properties on the armv7m object and the ARMSSE SoC object, and have the mps2-tz.c board code set the properties appropriately to match the config as described for those FPGA images. I have not looked at whether we also get this wrong for the older (M3, M4, M7) boards in hw/arm/mps2.c. I suspect we will want to allow users to reenable the old wrong behaviour if they had guest images built to run on QEMU and not tested on the real hardware. There are some notes in patch 3's commit message about that: with this series you can do that using the -global option, but this might not be the best way. thanks -- PMM Peter Maydell (3): target/arm: Do all "ARM_FEATURE_X implies Y" checks in post_init hw/arm/armv7m: Add mpu-ns-regions and mpu-s-regions properties hw/arm: Set number of MPU regions correctly for an505, an521, an524 include/hw/arm/armsse.h | 5 ++ include/hw/arm/armv7m.h | 8 ++ hw/arm/armsse.c | 16 ++++ hw/arm/armv7m.c | 21 +++++ hw/arm/mps2-tz.c | 29 +++++++ target/arm/cpu.c | 176 +++++++++++++++++++++------------------- 6 files changed, 173 insertions(+), 82 deletions(-)