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[201.69.66.19]) by smtp.gmail.com with ESMTPSA id a9-20020a05680802c900b003a020d24d7dsm2174435oid.56.2023.07.12.12.01.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jul 2023 12:01:56 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, Daniel Henrique Barboza Subject: [PATCH for-8.2 0/7] target/riscv: add 'max' CPU type Date: Wed, 12 Jul 2023 16:01:42 -0300 Message-ID: <20230712190149.424675-1-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::233; envelope-from=dbarboza@ventanamicro.com; helo=mail-oi1-x233.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Hi, Following the discussions made in [1] I decided to go ahead and implement the 'max' CPU type. It's a CPU that has (almost) all ratified non-vendor extensions enabled by default. Tooling such as libvirt uses this kind of CPU to do capabilities discovery. It's also used for testing purposes. To implement this CPU I did some cleanups in the riscv_cpu_extensions[] array. After this series this array contains only ratified extensions. This is a preliminary step for future changes we're planning to do in the CPU modelling in QEMU, including 'profile' support. Daniel Henrique Barboza (7): target/riscv/cpu.c: split CPU options from riscv_cpu_extensions[] target/riscv/cpu.c: skip 'bool' check when filtering KVM props target/riscv/cpu.c: split vendor exts from riscv_cpu_extensions[] target/riscv/cpu.c: split non-ratified exts from riscv_cpu_extensions[] target/riscv/cpu.c: add a ADD_CPU_PROPERTIES_ARRAY() macro target/riscv: add 'max' CPU type avocado, risc-v: add opensbi tests for 'max' CPU target/riscv/cpu-qom.h | 1 + target/riscv/cpu.c | 106 ++++++++++++++++++++++++++------- tests/avocado/riscv_opensbi.py | 16 +++++ 3 files changed, 103 insertions(+), 20 deletions(-)