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[v2,00/11] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop

Message ID 20230710175102.32429-1-philmd@linaro.org
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Series hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop | expand

Message

Philippe Mathieu-Daudé July 10, 2023, 5:50 p.m. UTC 
Hi,

This series add support for (async) FIFO on the transmit path
of the PL011 UART.

Since v1:
- Restrict pl011_ops[] impl access_size,
- Do not check transmitter is enabled (Peter),
- Addressed Alex's review comments,
- Simplified migration trying to care about backward compat,
  but still unsure...

Philippe Mathieu-Daudé (11):
  hw/char/pl011: Restrict MemoryRegionOps implementation access sizes
  hw/char/pl011: Display register name in trace events
  hw/char/pl011: Remove duplicated PL011_INT_[RT]X definitions
  hw/char/pl011: Replace magic values by register field definitions
  hw/char/pl011: Split RX/TX path of pl011_reset_fifo()
  hw/char/pl011: Extract pl011_write_txdata() from pl011_write()
  hw/char/pl011: Extract pl011_read_rxdata() from pl011_read()
  hw/char/pl011: Warn when using disabled transmitter
  hw/char/pl011: Check if receiver is enabled
  hw/char/pl011: Rename RX FIFO methods
  hw/char/pl011: Implement TX FIFO

 include/hw/char/pl011.h |   2 +
 hw/char/pl011.c         | 255 ++++++++++++++++++++++++++++++++--------
 hw/char/trace-events    |  12 +-
 3 files changed, 215 insertions(+), 54 deletions(-)