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Wed, 28 Jun 2023 21:08:04 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7LZ6bobQvK1+FwQNHPOJx0dvmuaamEu2hTx3RnhAH+abILUCT4P61bN1/tc3owvluiIwwGxQ== X-Received: by 2002:a17:90a:1906:b0:25e:a8ab:9157 with SMTP id 6-20020a17090a190600b0025ea8ab9157mr34067020pjg.22.1688011684031; Wed, 28 Jun 2023 21:08:04 -0700 (PDT) Received: from localhost.localdomain ([203.163.234.183]) by smtp.googlemail.com with ESMTPSA id 21-20020a17090a019500b00256b67208b1sm10978169pjc.56.2023.06.28.21.08.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Jun 2023 21:08:03 -0700 (PDT) From: Ani Sinha To: qemu-devel@nongnu.org Cc: Ani Sinha , mst@redhat.com, imammedo@redhat.com, jusual@redhat.com, thuth@redhat.com, lvivier@redhat.com, michael.labiuk@virtuozzo.com Subject: [PATCH v6 0/5] test and QEMU fixes to ensure proper PCIE device usage Date: Thu, 29 Jun 2023 09:37:02 +0530 Message-Id: <20230629040707.115656-1-anisinha@redhat.com> X-Mailer: git-send-email 2.39.1 MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.129.124; envelope-from=anisinha@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Patches 1-4: Fix tests so that devices do not use non-zero slots on the pcie root ports. PCIE ports only have one slot, so PCIE devices can only be plugged into slot 0 on a PCIE port. Patch 5: Enforce only one slot on PCIE port. The test fixes must be applied before the QEMU change that checks for use of a single slot in PCIE port. CC: mst@redhat.com CC: imammedo@redhat.com CC: jusual@redhat.com CC: thuth@redhat.com CC: lvivier@redhat.com CC: michael.labiuk@virtuozzo.com Changelog: =========== v6: make patch 5 ARI compliant. fix commit message (s/pcie-root-port/pcie-to-pci/) in patch 4. Rebase patchset to latest master. v5: no code changes - correct a mistake in the commit log message. v4: reword commit log for patch 4. v3: tags added. reword the error description in patch 5. Reword commit log in patch 4. v2: add hd-geo-test fix as well as the actual QEMU code fix to the patchset. The patches are added in the right order. Ani Sinha (5): tests/acpi: allow changes in DSDT.noacpihp table blob tests/acpi/bios-tables-test: use the correct slot on the pcie-root-port tests/acpi/bios-tables-test: update acpi blob q35/DSDT.noacpihp tests/qtest/hd-geo-test: fix incorrect pcie-root-port usage and simplify test hw/pci: ensure PCIE devices are plugged into only slot 0 of PCIE port hw/pci/pci.c | 15 +++++++++++++++ tests/data/acpi/q35/DSDT.noacpihp | Bin 8248 -> 8241 bytes tests/qtest/bios-tables-test.c | 4 ++-- tests/qtest/hd-geo-test.c | 18 ++++++++---------- 4 files changed, 25 insertions(+), 12 deletions(-)