| Message ID | 20230625120317.13877-1-npiggin@gmail.com |
|---|---|
| Headers | show |
| Series | target/ppc: Easy parts of the POWER chiptod series | expand |
On 6/25/23 14:03, Nicholas Piggin wrote: > Cedric kindly reviewed these already so I think they should be > good to go now. This is just a rebase and slight rewording the > changelog. Still haven't completed the main chiptod device yet. > > Thanks, > Nick > > Nicholas Piggin (2): > target/ppc: Tidy POWER book4 SPR registration > target/ppc: Add TFMR SPR implementation with read and write helpers > > target/ppc/cpu_init.c | 82 ++++++++++++++++++++++++------------ > target/ppc/helper.h | 2 + > target/ppc/spr_common.h | 2 + > target/ppc/timebase_helper.c | 13 ++++++ > target/ppc/translate.c | 10 +++++ > 5 files changed, 82 insertions(+), 27 deletions(-) > Daniel, When you start building the next PPC PR, I think you can also take this patch : [4/4] target/ppc: Implement core timebase state machine and TFMR https://patchwork.ozlabs.org/project/qemu-ppc/patch/20230603233612.125879-5-npiggin@gmail.com/ It belongs to the same series. Thanks, C.
On 6/29/23 01:58, Cédric Le Goater wrote: > On 6/25/23 14:03, Nicholas Piggin wrote: >> Cedric kindly reviewed these already so I think they should be >> good to go now. This is just a rebase and slight rewording the >> changelog. Still haven't completed the main chiptod device yet. >> >> Thanks, >> Nick >> >> Nicholas Piggin (2): >> target/ppc: Tidy POWER book4 SPR registration >> target/ppc: Add TFMR SPR implementation with read and write helpers >> >> target/ppc/cpu_init.c | 82 ++++++++++++++++++++++++------------ >> target/ppc/helper.h | 2 + >> target/ppc/spr_common.h | 2 + >> target/ppc/timebase_helper.c | 13 ++++++ >> target/ppc/translate.c | 10 +++++ >> 5 files changed, 82 insertions(+), 27 deletions(-) >> > > > Daniel, > > When you start building the next PPC PR, I think you can also take > this patch : > > [4/4] target/ppc: Implement core timebase state machine and TFMR > https://patchwork.ozlabs.org/project/qemu-ppc/patch/20230603233612.125879-5-npiggin@gmail.com/ > > It belongs to the same series. That doesn't apply cleanly with these 2 patches and it didn't look trivial to me. As if there were some code missing. If Nick re-send it rebased on top of ppc-next I can queue it. Since it's a rebase you can keep the r-b. Thanks, Daniel > > Thanks, > > C.
On Sat Jul 1, 2023 at 5:38 AM AEST, Daniel Henrique Barboza wrote: > > > On 6/29/23 01:58, Cédric Le Goater wrote: > > On 6/25/23 14:03, Nicholas Piggin wrote: > >> Cedric kindly reviewed these already so I think they should be > >> good to go now. This is just a rebase and slight rewording the > >> changelog. Still haven't completed the main chiptod device yet. > >> > >> Thanks, > >> Nick > >> > >> Nicholas Piggin (2): > >> target/ppc: Tidy POWER book4 SPR registration > >> target/ppc: Add TFMR SPR implementation with read and write helpers > >> > >> target/ppc/cpu_init.c | 82 ++++++++++++++++++++++++------------ > >> target/ppc/helper.h | 2 + > >> target/ppc/spr_common.h | 2 + > >> target/ppc/timebase_helper.c | 13 ++++++ > >> target/ppc/translate.c | 10 +++++ > >> 5 files changed, 82 insertions(+), 27 deletions(-) > >> > > > > > > Daniel, > > > > When you start building the next PPC PR, I think you can also take > > this patch : > > > > [4/4] target/ppc: Implement core timebase state machine and TFMR > > https://patchwork.ozlabs.org/project/qemu-ppc/patch/20230603233612.125879-5-npiggin@gmail.com/ > > > > It belongs to the same series. > > That doesn't apply cleanly with these 2 patches and it didn't look trivial to > me. As if there were some code missing. Yeah, it actually uses some signals from the nest chiptod patch. > If Nick re-send it rebased on top of ppc-next I can queue it. Since it's a > rebase you can keep the r-b. Thanks, I'll see how it goes, it may have to wait for next merge. SMT for powernv is a little more important since it's more user-facing and it would be nice to introduce SMT for both pseries and powernv together. Chiptod for doesn't really do much except step through skiboot init code, and getting more useful things wired up like TB fault / HMI injection won't be ready before freeze. Thanks, Nick
>>> When you start building the next PPC PR, I think you can also take >>> this patch : >>> >>> [4/4] target/ppc: Implement core timebase state machine and TFMR >>> https://patchwork.ozlabs.org/project/qemu-ppc/patch/20230603233612.125879-5-npiggin@gmail.com/ >>> >>> It belongs to the same series. >> >> That doesn't apply cleanly with these 2 patches and it didn't look trivial to >> me. As if there were some code missing. > > Yeah, it actually uses some signals from the nest chiptod patch. > >> If Nick re-send it rebased on top of ppc-next I can queue it. Since it's a >> rebase you can keep the r-b. Thanks, > > I'll see how it goes, it may have to wait for next merge. SMT for > powernv is a little more important since it's more user-facing and it > would be nice to introduce SMT for both pseries and powernv together. Yes. Please resend. I gave the series a good try with an install of 23.04 on a powernv9 machine with 2*2*4 CPUs and running KVM SMP guests with libvirt. It was performing quite well with MTTCG on a 32 CPU ryzen box. No hangs, no crash. This is a great addition. Thanks for it. I'll try VFIO after merge. Cheers, C. > Chiptod for doesn't really do much except step through skiboot init > code, and getting more useful things wired up like TB fault / HMI > injection won't be ready before freeze. > > Thanks, > Nick