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Fri, 23 Jun 2023 06:17:13 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5gfQBfCAkiEy8VHHoFe3ssZDE5Jr4vLYxMmAw4NUSXrlgu5pHYFSLHncGDNeC5b2dkwLEaeA== X-Received: by 2002:a50:ee14:0:b0:51a:59d1:fb37 with SMTP id g20-20020a50ee14000000b0051a59d1fb37mr11819103eds.28.1687526233307; Fri, 23 Jun 2023 06:17:13 -0700 (PDT) Received: from [192.168.10.118] ([2001:b07:6468:f312:9af8:e5f5:7516:fa89]) by smtp.gmail.com with ESMTPSA id n26-20020aa7c79a000000b0051be5bbce23sm2621447eds.35.2023.06.23.06.17.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Jun 2023 06:17:12 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: richard.henderson@linaro.org Subject: [PATCH v3 00/11] target/i386: add a few simple features Date: Fri, 23 Jun 2023 15:17:00 +0200 Message-ID: <20230623131711.96775-1-pbonzini@redhat.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org In preparation for supporting named CPU models for user-mode emulation, add a few TCG features that are actually already implemented, or that are easy to implement. The most important (and most relevant to user-mode emulation) are RDSEED, RDPID, and for 32-bit processors SYSCALL as well. Paolo v1->v2: - fix WBNOINVD vmexit - correctly implement 32-bit SYSCALL and SYSENTER - do not include linux-user/ from target/ v2->v3: - do not accept RDSEED if CPUID bit absent - also raise illegal opcode exception for SYSRET in 32-bit mode for Intel CPUs - raise illegal opcode exception for SYSENTER/SYSEXIT in 64-bit mode for AMD CPUs - Also try sched_getcpu() to return a sensible value for RDPID, since FreeBSD does write the CPUID to MSR_TSC_AUX. - Fully implement SYSCALL/SYSRET for 32-bit processors, including system emulators Paolo Bonzini (11): target/i386: fix INVD vmexit target/i386: TCG supports 3DNow! prefetch(w) target/i386: TCG supports RDSEED target/i386: do not accept RDSEED if CPUID bit absent target/i386: TCG supports XSAVEERPTR target/i386: TCG supports WBNOINVD target/i386: Intel only supports SYSCALL/SYSRET in long mode target/i386: AMD only supports SYSENTER/SYSEXIT in 32-bit mode target/i386: sysret and sysexit are privileged target/i386: implement RDPID in TCG target/i386: implement SYSCALL/SYSRET in 32-bit emulators bsd-user/i386/target_arch_cpu.h | 4 +++ linux-user/i386/cpu_loop.c | 13 ++++--- meson.build | 2 ++ target/i386/cpu.c | 31 +++++++++++----- target/i386/helper.h | 4 +-- target/i386/tcg/misc_helper.c | 21 +++++++---- target/i386/tcg/seg_helper.c | 7 ++-- target/i386/tcg/sysemu/seg_helper.c | 7 ++-- target/i386/tcg/translate.c | 55 ++++++++++++++++++++++------- target/i386/tcg/user/seg_helper.c | 2 -- 10 files changed, 105 insertions(+), 41 deletions(-)