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[77.183.4.175]) by smtp.gmail.com with ESMTPSA id j6-20020a17090686c600b008c44438734csm1993248ejy.113.2023.03.04.03.40.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 04 Mar 2023 03:40:55 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Aleksandar Rikalo , Artyom Tarasenko , Marcel Apfelbaum , =?utf-8?q?Philippe_Mathieu-D?= =?utf-8?q?aud=C3=A9?= , Mark Cave-Ayland , Paul Burton , Huacai Chen , BALATON Zoltan , Jiaxun Yang , "Michael S. Tsirkin" , Aurelien Jarno , =?utf-8?q?Herv=C3=A9_Poussineau?= , Eduardo Habkost , qemu-ppc@nongnu.org, Richard Henderson , Paolo Bonzini , Bernhard Beschow Subject: [PATCH 0/5] Fix recent PIC -> CPU interrupt wiring regressions Date: Sat, 4 Mar 2023 12:40:38 +0100 Message-Id: <20230304114043.121024-1-shentey@gmail.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52c; envelope-from=shentey@gmail.com; helo=mail-ed1-x52c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org A recent series [1] attempted to remove some PIC -> CPU interrupt indirections. This inadvertantly caused NULL qemu_irqs to be passed to the i8259 because the qemu_irqs aren't initialized at that time yet. This series provides a fix by initializing the qemu_irq of the respective south bridges before they are passed to i2859_init(). Furthermore -- as an optional extension -- this series also fixes some usability issues in the API for creating multifunction PCI devices. The series is structured as follows: The first three commits fix the regressions, the last two fix the public API for creating multifunction PCI devices. [1] https://lore.kernel.org/qemu-devel/20230302224058.43315-1-philmd@linaro.org/ Bernhard Beschow (5): hw/isa/vt82c686: Fix wiring of PIC -> CPU interrupt hw/alpha/dp264: Fix wiring of PIC -> CPU interrupt hw/ppc/prep: Fix wiring of PIC -> CPU interrupt hw/pci/pci: Remove multifunction parameter from pci_create_simple_multifunction() hw/pci/pci: Remove multifunction parameter from pci_new_multifunction() include/hw/pci/pci.h | 4 +--- hw/alpha/dp264.c | 8 +++++--- hw/i386/pc_piix.c | 2 +- hw/i386/pc_q35.c | 10 +++++----- hw/isa/vt82c686.c | 3 ++- hw/mips/boston.c | 3 +-- hw/mips/fuloong2e.c | 9 +++++---- hw/mips/malta.c | 2 +- hw/pci-host/sabre.c | 6 ++---- hw/pci/pci.c | 18 ++++++++++++------ hw/ppc/pegasos2.c | 9 +++++---- hw/ppc/prep.c | 4 +++- hw/sparc64/sun4u.c | 5 ++--- 13 files changed, 45 insertions(+), 38 deletions(-)