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Sat, 10 Dec 2022 07:55:04 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Milica Lazarevic , Dragan Mladjenovic , Aurelien Jarno , Djordje Todorovic , Jiaxun Yang , Bernhard Beschow Subject: [PATCH-for-8.0 0/7] hw/mips/malta: Generate nanoMIPS bootloader with bootloader generator API Date: Sat, 10 Dec 2022 16:54:55 +0100 Message-Id: <20221210155502.74609-1-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Bernhard posted his "Consolidate PIIX south bridges" v3 series: https://lore.kernel.org/qemu-devel/20221204190553.3274-1-shentey@gmail.com/ However in order to simplify it, on the Malta board we need to set the PIIX IRQC[A:D] routing values via the embedded bootloader (used when no external BIOS is provided). Jiaxun added a "bootloader generator API" for 32-bit wide instructions, and we use it in the write_bootloader() function. This series provides the nanoMIPS equivalent generated instructions and update the write_bootloader_nanomips() function. That allow fixing the TODO left in https://lore.kernel.org/qemu-devel/20221027204720.33611-3-philmd@linaro.org/ and apply Bernhard's consolidation. Please review, Phil. Philippe Mathieu-Daudé (7): hw/mips/bootloader: Handle buffers as opaque arrays hw/mips/bootloader: Pass 32-bit immediate value to LUI opcode generator hw/mips/bootloader: Implement nanoMIPS NOP opcode hw/mips/bootloader: Implement nanoMIPS LUI opcode hw/mips/bootloader: Implement nanoMIPS SW opcode hw/mips/bootloader: Implement nanoMIPS SW opcode hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs hw/mips/bootloader.c | 140 +++++++++++++++++++++++------ hw/mips/malta.c | 167 ++++++++++------------------------- include/hw/mips/bootloader.h | 10 +-- 3 files changed, 162 insertions(+), 155 deletions(-)