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[77.191.182.143]) by smtp.gmail.com with ESMTPSA id 2-20020a170906210200b00730979f568fsm9297138ejt.150.2022.09.15.08.25.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Sep 2022 08:25:50 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Kevin Wolf , Hanna Reitz , qemu-block@nongnu.org, Bin Meng , qemu-ppc@nongnu.org, Bernhard Beschow Subject: [PATCH 00/11] ppc/e500: Add support for two types of flash, cleanup Date: Thu, 15 Sep 2022 17:25:09 +0200 Message-Id: <20220915152520.21948-1-shentey@gmail.com> X-Mailer: git-send-email 2.37.3 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::635; envelope-from=shentey@gmail.com; helo=mail-ej1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" This series adds support for -pflash and direct SD card access to the PPC e500 boards. The idea is to increase compatibility with "real" firmware images where only the bare minimum of drivers is compiled in. The series is structured as follows: Patches 1-3 perform some general cleanup which paves the way for the rest of the series. Patches 4-7 add -pflash handling where memory-mapped flash can be added on user's behalf. That is, the flash memory region is only added if the -pflash argument is supplied. Note that the cfi01 device model becomes stricter in checking the size of the emulated flash space. Patches 8-11 add a new device model - the Freescale eSDHC - to the e500 boards which was missing so far. User documentation is also added as the new features become available. Tesing done: * `qemu-system-ppc -M ppce500 -cpu e500mc -m 256 -kernel uImage -append "console=ttyS0 rootwait root=/dev/mtdblock0 nokaslr" -drive if=pflash,file=rootfs.ext2,format=raw` * `qemu-system-ppc -M ppce500 -cpu e500mc -m 256 -kernel uImage -append "console=ttyS0 rootwait root=/dev/mmcblk0" -device sd-card,drive=mydrive -drive id=mydrive,if=none,file=rootfs.ext2,format=raw` The load was created using latest Buildroot with `make qemu_ppc_e500mc_defconfig` where the rootfs was configured to be of ext2 type. In both cases it was possible to log in and explore the root file system. Bernhard Beschow (11): hw/ppc/meson: Allow e500 boards to be enabled separately hw/gpio/meson: Introduce dedicated config switch for hw/gpio/mpc8xxx docs/system/ppc/ppce500: Add heading for networking chapter hw/ppc/mpc8544ds: Add platform bus hw/ppc/e500: Remove if statement which is now always true hw/block/pflash_cfi01: Error out if device length isn't a power of two hw/ppc/e500: Implement pflash handling hw/sd/sdhci-internal: Unexport ESDHC defines hw/sd/sdhci: Rename ESDHC_* defines to USDHC_* hw/sd/sdhci: Implement Freescale eSDHC device model hw/ppc/e500: Add Freescale eSDHC to e500 boards configs/devices/ppc-softmmu/default.mak | 3 +- docs/system/ppc/ppce500.rst | 28 ++++ hw/block/pflash_cfi01.c | 8 +- hw/gpio/Kconfig | 3 + hw/gpio/meson.build | 2 +- hw/ppc/Kconfig | 11 ++ hw/ppc/e500.c | 116 +++++++++++-- hw/ppc/e500.h | 1 - hw/ppc/e500plat.c | 1 - hw/ppc/meson.build | 6 +- hw/ppc/mpc8544ds.c | 5 + hw/sd/sdhci-internal.h | 20 --- hw/sd/sdhci.c | 212 +++++++++++++++++++++--- include/hw/sd/sdhci.h | 3 + 14 files changed, 349 insertions(+), 70 deletions(-)