mbox series

[RFC,0/3] Implement Sstc extension

Message ID 20220304032023.730344-1-atishp@rivosinc.com
Headers show
Series Implement Sstc extension | expand

Message

Atish Kumar Patra March 4, 2022, 3:20 a.m. UTC 
This series implements Sstc extension[1] which was ratified recently.

The first patch is a prepartory patches while PATCH 2 adds stimecmp
support while PATCH 3 adds vstimecmp support. This series is based on
the ISA extension[2] & privilege version update series[3].

The series can also be found at
https://github.com/atishp04/qemu/tree/sstc_v1

It is tested on RV32 & RV64 with additional OpenSBI[4] & Linux kernel[5]
patches.

[1] https://drive.google.com/file/d/1m84Re2yK8m_vbW7TspvevCDR82MOBaSX/view
[2] https://lore.kernel.org/all/20220222220704.2294924-1-atishp@rivosinc.com/
[3] https://www.mail-archive.com/qemu-devel@nongnu.org/msg870659.html
[4] https://github.com/atishp04/opensbi/tree/sstc_v1
[5] https://github.com/atishp04/linux/tree/sstc_v2

Atish Patra (3):
target/riscv: Rename timer & timecmp to mtimer and mtimecmp
target/riscv: Add stimecmp support
target/riscv: Add vstimecmp support

hw/intc/riscv_aclint.c     |  20 ++--
hw/timer/ibex_timer.c      |  14 +--
target/riscv/cpu.c         |   7 ++
target/riscv/cpu.h         |  12 ++-
target/riscv/cpu_bits.h    |   8 ++
target/riscv/cpu_helper.c  |  11 ++-
target/riscv/csr.c         | 183 +++++++++++++++++++++++++++++++++++++
target/riscv/machine.c     |   4 +-
target/riscv/meson.build   |   3 +-
target/riscv/time_helper.c | 113 +++++++++++++++++++++++
target/riscv/time_helper.h |  30 ++++++
11 files changed, 381 insertions(+), 24 deletions(-)
create mode 100644 target/riscv/time_helper.c
create mode 100644 target/riscv/time_helper.h

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2.30.2