| Message ID | 20220111084546.4145785-1-troy_lee@aspeedtech.com |
|---|---|
| Headers | show |
| Series | Aspeed I3C device model | expand |
On 1/11/22 09:45, Troy Lee wrote: > This series of patch introduce a dummy implemenation of aspeed i3c > model, and it provide just enough information for guest machine. > However, the driver probing is still failed, but it will not cause > kernel panic. > > v3: > - Remove unused AspeedI3CClass > - Refine memory region > - Refine register reset > - Remove unrelated changes to SPI2 address > - Remove i3c controller irq line > > v2: > - Split i3c model into i3c and i3c_device > - Create 6x i3c devices > - Using register fields macro > - Rebase to mainline QEMU > > Troy Lee (2): > Introduce a dummy AST2600 I3C model. > This patch includes i3c instance in ast2600 soc. It's nice to add a "hw/arm/aspeed: " prefix to the Subject, or "aspeed: " at least. In case you resend, keep my "Reviewed-by". You can grab the patches on : http://patchwork.ozlabs.org/project/qemu-devel/list/?series=280442 with : pwclient get 1578334 1578335 Thanks, C.
On Tue, Jan 11, 2022 at 04:45:44PM +0800, Troy Lee wrote: > This series of patch introduce a dummy implemenation of aspeed i3c > model, and it provide just enough information for guest machine. > However, the driver probing is still failed, but it will not cause > kernel panic. > These patches arrived just in time for our i3c testing. This stops our CI halting due to kernel panic on i3c probing. Reviewed-by: Graeme Gregory <quic_ggregory@quicinc.com> Tested-by: Graeme Gregory <quic_ggregory@quicinc.com> > v3: > - Remove unused AspeedI3CClass > - Refine memory region > - Refine register reset > - Remove unrelated changes to SPI2 address > - Remove i3c controller irq line > > v2: > - Split i3c model into i3c and i3c_device > - Create 6x i3c devices > - Using register fields macro > - Rebase to mainline QEMU > > Troy Lee (2): > Introduce a dummy AST2600 I3C model. > This patch includes i3c instance in ast2600 soc. > > hw/arm/aspeed_ast2600.c | 16 ++ > hw/misc/aspeed_i3c.c | 381 +++++++++++++++++++++++++++++++++++ > hw/misc/meson.build | 1 + > hw/misc/trace-events | 6 + > include/hw/arm/aspeed_soc.h | 3 + > include/hw/misc/aspeed_i3c.h | 48 +++++ > 6 files changed, 455 insertions(+) > create mode 100644 hw/misc/aspeed_i3c.c > create mode 100644 include/hw/misc/aspeed_i3c.h > > -- > 2.25.1 > >
Hello Gregory, On 1/12/22 11:57, Graeme Gregory wrote: > On Tue, Jan 11, 2022 at 04:45:44PM +0800, Troy Lee wrote: >> This series of patch introduce a dummy implemenation of aspeed i3c >> model, and it provide just enough information for guest machine. >> However, the driver probing is still failed, but it will not cause >> kernel panic. >> > > These patches arrived just in time for our i3c testing. This stops > our CI halting due to kernel panic on i3c probing. > > Reviewed-by: Graeme Gregory <quic_ggregory@quicinc.com> > Tested-by: Graeme Gregory <quic_ggregory@quicinc.com> Excellent ! Are you using the Aspeed image from : https://github.com/AspeedTech-BMC/openbmc/releases/tag/v07.02 or your custom ones ? Thanks, C.
On Wed, Jan 12, 2022 at 6:57 PM Graeme Gregory <quic_ggregory@quicinc.com> wrote: > > On Tue, Jan 11, 2022 at 04:45:44PM +0800, Troy Lee wrote: > > This series of patch introduce a dummy implemenation of aspeed i3c > > model, and it provide just enough information for guest machine. > > However, the driver probing is still failed, but it will not cause > > kernel panic. > > > > These patches arrived just in time for our i3c testing. This stops > our CI halting due to kernel panic on i3c probing. > > Reviewed-by: Graeme Gregory <quic_ggregory@quicinc.com> > Tested-by: Graeme Gregory <quic_ggregory@quicinc.com> > I'm glad it was able to help. Thanks, Troy Lee > > v3: > > - Remove unused AspeedI3CClass > > - Refine memory region > > - Refine register reset > > - Remove unrelated changes to SPI2 address > > - Remove i3c controller irq line > > > > v2: > > - Split i3c model into i3c and i3c_device > > - Create 6x i3c devices > > - Using register fields macro > > - Rebase to mainline QEMU > > > > Troy Lee (2): > > Introduce a dummy AST2600 I3C model. > > This patch includes i3c instance in ast2600 soc. > > > > hw/arm/aspeed_ast2600.c | 16 ++ > > hw/misc/aspeed_i3c.c | 381 +++++++++++++++++++++++++++++++++++ > > hw/misc/meson.build | 1 + > > hw/misc/trace-events | 6 + > > include/hw/arm/aspeed_soc.h | 3 + > > include/hw/misc/aspeed_i3c.h | 48 +++++ > > 6 files changed, 455 insertions(+) > > create mode 100644 hw/misc/aspeed_i3c.c > > create mode 100644 include/hw/misc/aspeed_i3c.h > > > > -- > > 2.25.1 > > > >
On Wed, Jan 12, 2022 at 01:45:05PM +0100, Cédric Le Goater wrote: > Hello Gregory, > > On 1/12/22 11:57, Graeme Gregory wrote: > > On Tue, Jan 11, 2022 at 04:45:44PM +0800, Troy Lee wrote: > > > This series of patch introduce a dummy implemenation of aspeed i3c > > > model, and it provide just enough information for guest machine. > > > However, the driver probing is still failed, but it will not cause > > > kernel panic. > > > > > > > These patches arrived just in time for our i3c testing. This stops > > our CI halting due to kernel panic on i3c probing. > > > > Reviewed-by: Graeme Gregory <quic_ggregory@quicinc.com> > > Tested-by: Graeme Gregory <quic_ggregory@quicinc.com> > > Excellent ! > > Are you using the Aspeed image from : > > https://github.com/AspeedTech-BMC/openbmc/releases/tag/v07.02 > > or your custom ones ? > We are using the drivers from the v5.4 based SDK currently. Hacked into the v5.15 kernel of openbmc upstream! We needed something quick to test a new PCB. Graeme
On Tue, 11 Jan 2022 at 08:48, Troy Lee <troy_lee@aspeedtech.com> wrote: > > This series of patch introduce a dummy implemenation of aspeed i3c > model, and it provide just enough information for guest machine. > However, the driver probing is still failed, but it will not cause > kernel panic. > > v3: > - Remove unused AspeedI3CClass > - Refine memory region > - Refine register reset > - Remove unrelated changes to SPI2 address > - Remove i3c controller irq line > > v2: > - Split i3c model into i3c and i3c_device > - Create 6x i3c devices > - Using register fields macro > - Rebase to mainline QEMU > > Troy Lee (2): > Introduce a dummy AST2600 I3C model. > This patch includes i3c instance in ast2600 soc. Applied to target-arm.next, thanks. I have tidied up the commit messages a bit (removing the v2/v3 changes information, for instance). I would echo Cédric's suggestion that you send a patch that updates the documentation to note that this device is now partially implemented. -- PMM