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Fri, 16 Apr 2021 15:49:18 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E054D11C04C; Fri, 16 Apr 2021 15:49:40 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0525E11C050; Fri, 16 Apr 2021 15:49:40 +0000 (GMT) Received: from vm.lan (unknown [9.145.157.105]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 16 Apr 2021 15:49:39 +0000 (GMT) From: Ilya Leoshkevich To: Cornelia Huck , Thomas Huth , Richard Henderson , David Hildenbrand , Paolo Bonzini , Peter Maydell , Max Filippov Subject: [PATCH v5 0/4] accel/tcg: Make sure that tb->size != 0 after translation Date: Fri, 16 Apr 2021 17:49:35 +0200 Message-Id: <20210416154939.32404-1-iii@linux.ibm.com> X-Mailer: git-send-email 2.29.2 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: NdW9b8RPf2yoyIKcWS8poAYp30qLEa4N X-Proofpoint-ORIG-GUID: tM-Y3PHzr_ig3Cq3uKU1rz8xF4B4LSkZ X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-04-16_08:2021-04-16, 2021-04-16 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 priorityscore=1501 phishscore=0 malwarescore=0 impostorscore=0 adultscore=0 bulkscore=0 suspectscore=0 spamscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104060000 definitions=main-2104160112 Received-SPF: pass client-ip=148.163.156.1; envelope-from=iii@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Christian Borntraeger , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org, Ilya Leoshkevich Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" If arch-specific code generates a translation block of size 0, tb_gen_code() may generate a spurious exception. Fix s390x (patch 1), ARM (patch 2) and xtensa (patch 3) and add an assertion in order to catch such situations earlier (patch 4). v1: https://lists.nongnu.org/archive/html/qemu-devel/2021-04/msg02037.html v1 -> v2: Fix target/s390x instead of trying to tolerate tb->size == 0 in tb_gen_code(). v2: https://lists.nongnu.org/archive/html/qemu-devel/2021-04/msg02101.html v2 -> v3: Split the common code change into a separate patch, add the ARM patch in order to fix https://gitlab.com/cohuck/qemu/-/jobs/1178409450 v3: https://lists.nongnu.org/archive/html/qemu-devel/2021-04/msg02332.html v3 -> v4: Add the xtensa patch in order to fix https://gitlab.com/cohuck/qemu/-/jobs/1178409540 v4: https://lists.nongnu.org/archive/html/qemu-devel/2021-04/msg02592.html v4 -> v5: Handle thumb: the following C code triggers the assertion: typedef void (*funcptr)(void); int main() { funcptr f = (funcptr)0xffff0001; f(); } Ilya Leoshkevich (4): target/s390x: Fix translation exception on illegal instruction target/arm: Make sure that commpage's tb->size != 0 target/xtensa: Make sure that tb->size != 0 accel/tcg: Assert that tb->size != 0 after translation accel/tcg/translate-all.c | 1 + target/arm/translate.c | 2 ++ target/s390x/translate.c | 16 +++++++++++----- target/xtensa/translate.c | 3 +++ 4 files changed, 17 insertions(+), 5 deletions(-)