Message ID | 20190522142956.41916-1-ysato@users.sourceforge.jp |
---|---|
Headers | show |
Series | Add RX archtecture support | expand |
Hi Yoshinori, On 5/22/19 4:29 PM, Yoshinori Sato wrote: > Hello. > This patch series is added Renesas RX target emulation. > > Fix is bellow. > - Reorder patches. > - Rewrite renesas_cmt. > Convert to RCMTChannelStatus > - Use CPUClass::tlb_fill > - Use tcg_gen_abs_i32 > - Fix racw instructions. > - Cleanup for review comment. > target/rx/helper.c - fix spelling. > hw/intc/rx_icu.h - cleanup constant definition. > hw/registerfields.h - fix macro definion order. $ git backport-diff -u rx14 -r origin/master..rx15 Key: [----] : patches are identical [####] : number of functional differences between upstream/downstream patch [down] : patch is downstream-only The flags [FC] indicate (F)unctional and (C)ontextual differences, respectively 001/12:[----] [--] 'qemu/bitops.h: Add extract8 and extract16' 002/12:[0008] [FC] 'hw/registerfields.h: Add 8bit and 16bit register macros' 003/12:[0018] [FC] 'target/rx: TCG translation' 004/12:[0004] [FC] 'target/rx: TCG helper' 005/12:[0030] [FC] 'target/rx: CPU definition' 006/12:[----] [--] 'target/rx: RX disassembler' 007/12:[0003] [FC] 'hw/intc: RX62N interrupt controller (ICUa)' 008/12:[0178] [FC] 'hw/timer: RX62N internal timer modules' 009/12:[----] [--] 'hw/char: RX62N serial communication interface (SCI)' 010/12:[0004] [FC] 'hw/rx: RX Target hardware definition' 011/12:[----] [--] 'Add rx-softmmu' 012/12:[0004] [FC] 'MAINTAINERS: Add RX' - you removed rx_abs(), - one change in trans_RACW() - fixed typos (Richard fixe them) - LOT of changes in the timer device, you added RCMTChannelState() Hmm you did reset some of the R-b T-b tags. I guess Richard already prepared a pull request for your v14. At this point I'd prefer the v14 get merged, and the v15 changes amended as new commits. This would ease review/testing. Maybe Richard can still amend the 'trans_RACW' one-line fix on his pullreq. Richard what's your take on this? Regards, Phil. > My git repository is bellow. > git://git.pf.osdn.net/gitroot/y/ys/ysato/qemu.git tags/rx-20190522 > > Testing binaries bellow. > u-boot > Download - https://osdn.net/users/ysato/pf/qemu/dl/u-boot.bin.gz > > starting > $ gzip -d u-boot.bin.gz > $ qemu-system-rx -bios u-boot.bin > > linux and pico-root (only sash) > Download - https://osdn.net/users/ysato/pf/qemu/dl/zImage (kernel) > https://osdn.net/users/ysato/pf/qemu/dl/rx-qemu.dtb (DeviceTree) > > starting > $ qemu-system-rx -kernel zImage -dtb rx-qemu.dtb -append "earlycon" > > Yoshinori Sato (12): > qemu/bitops.h: Add extract8 and extract16 > hw/registerfields.h: Add 8bit and 16bit register macros. > target/rx: TCG translation > target/rx: TCG helper > target/rx: CPU definition > target/rx: RX disassembler > hw/intc: RX62N interrupt controller (ICUa) > hw/timer: RX62N internal timer modules > hw/char: RX62N serial communication interface (SCI) > hw/rx: RX Target hardware definition > Add rx-softmmu > MAINTAINERS: Add RX
Patchew URL: https://patchew.org/QEMU/20190522142956.41916-1-ysato@users.sourceforge.jp/ Hi, This series seems to have some coding style problems. See output below for more information: Message-id: 20190522142956.41916-1-ysato@users.sourceforge.jp Type: series Subject: [Qemu-devel] [PATCH v15 00/12] Add RX archtecture support === TEST SCRIPT BEGIN === #!/bin/bash git rev-parse base > /dev/null || exit 0 git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === From https://github.com/patchew-project/qemu * [new tag] patchew/20190522142956.41916-1-ysato@users.sourceforge.jp -> patchew/20190522142956.41916-1-ysato@users.sourceforge.jp Switched to a new branch 'test' aeafc091ae MAINTAINERS: Add RX 8056325ef2 Add rx-softmmu d1623988c9 hw/rx: RX Target hardware definition 0666705a3d hw/char: RX62N serial communication interface (SCI) 715c6c8702 hw/timer: RX62N internal timer modules 589c836cfc hw/intc: RX62N interrupt controller (ICUa) b2f2f21e69 target/rx: RX disassembler 135688dbad target/rx: CPU definition 5e4a355e3f target/rx: TCG helper 0a48d83f4c target/rx: TCG translation 4408dbd0c6 hw/registerfields.h: Add 8bit and 16bit register macros. 2873825fc1 qemu/bitops.h: Add extract8 and extract16 === OUTPUT BEGIN === 1/12 Checking commit 2873825fc151 (qemu/bitops.h: Add extract8 and extract16) 2/12 Checking commit 4408dbd0c6b0 (hw/registerfields.h: Add 8bit and 16bit register macros.) ERROR: Macros with multiple statements should be enclosed in a do - while loop #27: FILE: include/hw/registerfields.h:21: +#define REG8(reg, addr) \ + enum { A_ ## reg = (addr) }; \ + enum { R_ ## reg = (addr) }; ERROR: Macros with multiple statements should be enclosed in a do - while loop #30: FILE: include/hw/registerfields.h:24: +#define REG16(reg, addr) \ + enum { A_ ## reg = (addr) }; \ + enum { R_ ## reg = (addr) / 2 }; total: 2 errors, 0 warnings, 52 lines checked Patch 2/12 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 3/12 Checking commit 0a48d83f4c5d (target/rx: TCG translation) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #15: new file mode 100644 total: 0 errors, 1 warnings, 3053 lines checked Patch 3/12 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 4/12 Checking commit 5e4a355e3fcf (target/rx: TCG helper) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #12: new file mode 100644 total: 0 errors, 1 warnings, 660 lines checked Patch 4/12 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 5/12 Checking commit 135688dbadee (target/rx: CPU definition) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #11: new file mode 100644 WARNING: Block comments use * on subsequent lines #179: FILE: target/rx/cpu.c:164: + /* + RX has no-MMU ERROR: code indent should never use tabs #397: FILE: target/rx/cpu.h:137: + qemu_irq ack;^I^I/* Interrupt acknowledge */$ total: 1 errors, 2 warnings, 619 lines checked Patch 5/12 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 6/12 Checking commit b2f2f21e6980 (target/rx: RX disassembler) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #36: new file mode 100644 total: 0 errors, 1 warnings, 1497 lines checked Patch 6/12 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 7/12 Checking commit 589c836cfcc9 (hw/intc: RX62N interrupt controller (ICUa)) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #35: new file mode 100644 ERROR: code indent should never use tabs #430: FILE: include/hw/intc/rx_icu.h:9: + TRG_NEDGE = 1,^I/* Falling */$ ERROR: code indent should never use tabs #431: FILE: include/hw/intc/rx_icu.h:10: + TRG_PEDGE = 2,^I/* Raising */$ ERROR: code indent should never use tabs #432: FILE: include/hw/intc/rx_icu.h:11: + TRG_BEDGE = 3,^I/* Both */$ total: 3 errors, 1 warnings, 441 lines checked Patch 7/12 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 8/12 Checking commit 715c6c8702b8 (hw/timer: RX62N internal timer modules) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #45: new file mode 100644 total: 0 errors, 1 warnings, 827 lines checked Patch 8/12 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 9/12 Checking commit 0666705a3da3 (hw/char: RX62N serial communication interface (SCI)) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #40: new file mode 100644 total: 0 errors, 1 warnings, 398 lines checked Patch 9/12 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 10/12 Checking commit d1623988c974 (hw/rx: RX Target hardware definition) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #14: new file mode 100644 total: 0 errors, 1 warnings, 460 lines checked Patch 10/12 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 11/12 Checking commit 8056325ef252 (Add rx-softmmu) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #52: new file mode 100644 total: 0 errors, 1 warnings, 45 lines checked Patch 11/12 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 12/12 Checking commit aeafc091aee7 (MAINTAINERS: Add RX) === OUTPUT END === Test command exited with code: 1 The full log is available at http://patchew.org/logs/20190522142956.41916-1-ysato@users.sourceforge.jp/testing.checkpatch/?type=message. --- Email generated automatically by Patchew [https://patchew.org/]. Please send your feedback to patchew-devel@redhat.com
On Wed, 22 May 2019 23:50:41 +0900, Philippe Mathieu-Daudé wrote: > > Hi Yoshinori, > > On 5/22/19 4:29 PM, Yoshinori Sato wrote: > > Hello. > > This patch series is added Renesas RX target emulation. > > > > Fix is bellow. > > - Reorder patches. > > - Rewrite renesas_cmt. > > Convert to RCMTChannelStatus > > - Use CPUClass::tlb_fill > > - Use tcg_gen_abs_i32 > > - Fix racw instructions. > > - Cleanup for review comment. > > target/rx/helper.c - fix spelling. > > hw/intc/rx_icu.h - cleanup constant definition. > > hw/registerfields.h - fix macro definion order. > > $ git backport-diff -u rx14 -r origin/master..rx15 > Key: > [----] : patches are identical > [####] : number of functional differences between upstream/downstream patch > [down] : patch is downstream-only > The flags [FC] indicate (F)unctional and (C)ontextual differences, > respectively > > 001/12:[----] [--] 'qemu/bitops.h: Add extract8 and extract16' > 002/12:[0008] [FC] 'hw/registerfields.h: Add 8bit and 16bit register macros' > 003/12:[0018] [FC] 'target/rx: TCG translation' > 004/12:[0004] [FC] 'target/rx: TCG helper' > 005/12:[0030] [FC] 'target/rx: CPU definition' > 006/12:[----] [--] 'target/rx: RX disassembler' > 007/12:[0003] [FC] 'hw/intc: RX62N interrupt controller (ICUa)' > 008/12:[0178] [FC] 'hw/timer: RX62N internal timer modules' > 009/12:[----] [--] 'hw/char: RX62N serial communication interface (SCI)' > 010/12:[0004] [FC] 'hw/rx: RX Target hardware definition' > 011/12:[----] [--] 'Add rx-softmmu' > 012/12:[0004] [FC] 'MAINTAINERS: Add RX' > > - you removed rx_abs(), > - one change in trans_RACW() > - fixed typos (Richard fixe them) > - LOT of changes in the timer device, you added RCMTChannelState() > > Hmm you did reset some of the R-b T-b tags. > > > I guess Richard already prepared a pull request for your v14. > > At this point I'd prefer the v14 get merged, and the v15 changes amended > as new commits. This would ease review/testing. > > Maybe Richard can still amend the 'trans_RACW' one-line fix on his pullreq. > > Richard what's your take on this? > > Regards, > > Phil. OK. v15 fixes will be issued after merging. Thanks. > > My git repository is bellow. > > git://git.pf.osdn.net/gitroot/y/ys/ysato/qemu.git tags/rx-20190522 > > > > Testing binaries bellow. > > u-boot > > Download - https://osdn.net/users/ysato/pf/qemu/dl/u-boot.bin.gz > > > > starting > > $ gzip -d u-boot.bin.gz > > $ qemu-system-rx -bios u-boot.bin > > > > linux and pico-root (only sash) > > Download - https://osdn.net/users/ysato/pf/qemu/dl/zImage (kernel) > > https://osdn.net/users/ysato/pf/qemu/dl/rx-qemu.dtb (DeviceTree) > > > > starting > > $ qemu-system-rx -kernel zImage -dtb rx-qemu.dtb -append "earlycon" > > > > Yoshinori Sato (12): > > qemu/bitops.h: Add extract8 and extract16 > > hw/registerfields.h: Add 8bit and 16bit register macros. > > target/rx: TCG translation > > target/rx: TCG helper > > target/rx: CPU definition > > target/rx: RX disassembler > > hw/intc: RX62N interrupt controller (ICUa) > > hw/timer: RX62N internal timer modules > > hw/char: RX62N serial communication interface (SCI) > > hw/rx: RX Target hardware definition > > Add rx-softmmu > > MAINTAINERS: Add RX >