From patchwork Tue Oct 17 14:04:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Halil Pasic X-Patchwork-Id: 827044 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yGcST0QC8z9sP1 for ; Wed, 18 Oct 2017 01:06:49 +1100 (AEDT) Received: from localhost ([::1]:39690 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e4SW7-0007An-3A for incoming@patchwork.ozlabs.org; Tue, 17 Oct 2017 10:06:47 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55522) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e4SUW-0006RB-Mx for qemu-devel@nongnu.org; Tue, 17 Oct 2017 10:05:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e4SUT-0004VE-Ic for qemu-devel@nongnu.org; Tue, 17 Oct 2017 10:05:08 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:36766) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1e4SUT-0004Uo-9s for qemu-devel@nongnu.org; Tue, 17 Oct 2017 10:05:05 -0400 Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v9HE4m1f066542 for ; Tue, 17 Oct 2017 10:05:00 -0400 Received: from e06smtp14.uk.ibm.com (e06smtp14.uk.ibm.com [195.75.94.110]) by mx0a-001b2d01.pphosted.com with ESMTP id 2dngcb1s09-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 17 Oct 2017 10:05:00 -0400 Received: from localhost by e06smtp14.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 17 Oct 2017 15:04:55 +0100 Received: from d06av24.portsmouth.uk.ibm.com (mk.ibm.com [9.149.105.60]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id v9HE4tSl21364824; Tue, 17 Oct 2017 14:04:55 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 223D54203F; Tue, 17 Oct 2017 15:00:29 +0100 (BST) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DEFB742049; Tue, 17 Oct 2017 15:00:28 +0100 (BST) Received: from tuxmaker.boeblingen.de.ibm.com (unknown [9.152.85.9]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTPS; Tue, 17 Oct 2017 15:00:28 +0100 (BST) From: Halil Pasic To: Cornelia Huck , "Dong Jia Shi" Date: Tue, 17 Oct 2017 16:04:46 +0200 X-Mailer: git-send-email 2.13.5 X-TM-AS-GCONF: 00 x-cbid: 17101714-0016-0000-0000-000004F6AD20 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17101714-0017-0000-0000-00002831FCF9 Message-Id: <20171017140453.51099-1-pasic@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-10-17_10:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000 definitions=main-1710170197 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH v3 0/7] improve error handling for IO instr X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Halil Pasic , Pierre Morel , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Abstract ======= The basic idea is: tell how to handle an unusual condition where it's identified, instead of mapping it to an errno (more or less arbitrarily), then possibly mapping these errnos around, to finally (mentally) map the errno back to the condition and take appropriate action. According to Dong Jia the patch-set also has a functional value: for ccw pass-through, he is planing to pass-through the instruction completion information (cc or interruption condition) from the kernel, and this patch set can pretty much be seen as a preparation for that. Changelog ========= Patch 1 should be already applied to Conny's tree. I've included it nevertheless so guys working on top of current master have everything in place. v2 -> v3: * somewhat uwillingly traded the type safe struct to a somewhat type safe enum (because considered ugly) (Thomas, Conny) * dropped 'template approach' patch which intended to further consolidate IO inst. handlers having lot's of logic and code in common (Conny) * added warning if vfio-ccw ORB does not have the flags required by the vfio-ccw implementation as suggested (Dong Jia) * got rid of some unintentional changes (Dong Jia) * reworded some stuff (comments, commit messages) (Dong Jia) v1 -> v2: * use assert if do_subchannel_work without any functions being accepted * generate unit-exception if ccw-vfio can't handle an otherwise good channel program (due to extra limitations) * keep using return values opposed to recording into SubchDev * split out 'add infrastructure' from 'refactor first handler' * reworded some commit messanges and comments * rebased on top of current master * dropped r-b's and acks because of the magnitude of the changes Testing ======= Nothing happened since v2 except for a quick smoke test. Dong Jia gave v2 a spin with a focus on vfio-ccw. @Dong Jia I would appreciate some proper testing, especially regarding the changes in vfio-ccw (patch #3). Halil Pasic (7): s390x/css: be more consistent if broken beyond repair s390x/css: IO instr handler ending control s390x: improve error handling for SSCH and RSCH s390x: refactor error handling for XSCH handler s390x: refactor error handling for CSCH handler s390x: refactor error handling for HSCH handler s390x: refactor error handling for MSCH handler hw/s390x/css.c | 163 ++++++++++++-------------------------------- hw/s390x/s390-ccw.c | 11 ++- hw/vfio/ccw.c | 28 ++++++-- include/hw/s390x/css.h | 47 ++++++++++--- include/hw/s390x/s390-ccw.h | 2 +- target/s390x/ioinst.c | 136 +++++++----------------------------- 6 files changed, 132 insertions(+), 255 deletions(-) Tested-by: Dong Jia Shi