From patchwork Fri Mar 15 10:26:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chih-Min Chao X-Patchwork-Id: 1057034 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=sifive.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=sifive.com header.i=@sifive.com header.b="JWcbyhMK"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44LRgy2MqLz9s3q for ; Sat, 16 Mar 2019 00:46:38 +1100 (AEDT) Received: from localhost ([127.0.0.1]:55351 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h4nAR-0004qU-SF for incoming@patchwork.ozlabs.org; Fri, 15 Mar 2019 09:46:35 -0400 Received: from eggs.gnu.org ([209.51.188.92]:56121) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h4mmu-00038R-Vm for qemu-devel@nongnu.org; Fri, 15 Mar 2019 09:22:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h4mmt-0000rb-4Y for qemu-devel@nongnu.org; Fri, 15 Mar 2019 09:22:16 -0400 Received: from mail-pf1-x441.google.com ([2607:f8b0:4864:20::441]:34081) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1h4mmp-0000qd-Ar for qemu-devel@nongnu.org; Fri, 15 Mar 2019 09:22:13 -0400 Received: by mail-pf1-x441.google.com with SMTP id v64so6361968pfb.1 for ; Fri, 15 Mar 2019 06:22:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id; bh=kh3hZ916BvJK6TZhqXwrFRSh4R537v+bY9nx6+CiXoU=; b=JWcbyhMKOoT8Cyh8RsjwCnxW7ka9jvgTxFszvIGET/jnKRCM0+7U73gjBWmhzigKlY byIoZlMaCRqgw9c8OZ4olOZbC0JmSkhU6Dy7Fk78diWMJTMGMIr1xZcCaQNBCVY8itNz IiFsK7dT7f/Vy4mpb6JIXYqoWxdIwlaIopVH70Zcm0gvyUWOI05kxOD551z0+EseUaii iwuK0A17uiaNLemZltem4XHw0OYaOSX/gtqW9WwGLCF1T1I7QYNKOIhag/l7Lb5+KUEb sA55NbAB3hXZf9gFjcow0j1RT34pWv52K0dSMlv57gbvmG9BIqPCHPO90VJPzvOQcjON qzkg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=kh3hZ916BvJK6TZhqXwrFRSh4R537v+bY9nx6+CiXoU=; b=tIs3F7k0NfocypuS7kbd3o8KTBgwWKltyTI+GQMwc60/5v6OX0RIGXx8xaiMVKmSZq pFDZxvkz3gfiTjJxMudJcDmsg7ojvD1D5bcDXF9yWbHvmDy9WRXXNlJwXkc+NN43DMle SsRq+flBOBnvWNux2jxwlVavPvvdneLoHMAwiq5kiGTjcnKX4iAs39WBSsybP/n8YGA5 yYEYyrTSo+6UFKDdZPN4G/T6k/SfejzeHF1GWp6NoN+n/Z26WLIsaK3KSYG4XktN34va LCDaUBBrrMuic+O5LSA0R9Ccgowa5DwqiKvA4CxMcu1X5+3BFB6LAhLRWxLf1jJL3oiQ 4XTw== X-Gm-Message-State: APjAAAU3uiDYQBSo6kUswYif/9XugNNsLfsrFPRHEXoegmvKWxYCfKH7 UEzOHYrOL1YOQiW5zzV6SsWVWqnxqmOtkQ== X-Google-Smtp-Source: APXvYqwYNdq6Ol+AEBtRZ+X/l+t/yhjEhfevpquT555BviU6oC550FleFi1IOdwil5H3VCmuOJuTPg== X-Received: by 2002:a17:902:7202:: with SMTP id ba2mr3352160plb.147.1552645658879; Fri, 15 Mar 2019 03:27:38 -0700 (PDT) Received: from gamma06.internal.sifive.com ([64.62.193.194]) by smtp.gmail.com with ESMTPSA id f15sm2225401pfa.11.2019.03.15.03.27.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 15 Mar 2019 03:27:38 -0700 (PDT) From: Chih-Min Chao To: qemu-devel@nongnu.org Date: Fri, 15 Mar 2019 03:26:54 -0700 Message-Id: <1552645619-18244-1-git-send-email-chihmin.chao@sifive.com> X-Mailer: git-send-email 2.7.4 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::441 Subject: [Qemu-devel] [PATCH v5 0/5] RISC-V: Add gdb xml files and gdbstub support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chih-Min Chao , qemu-riscv@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" This is the 5th version of the patch set, based on the Jim's previous work, http://lists.nongnu.org/archive/html/qemu-riscv/2019-02/msg00059.html v4 -> v5: - rebase 7074ab1 - update the register xml files to gdb 8.3 - refine the fpu control registers, fflags/frm/fcsr index calculation - fix the csr offset calculcation because of tne regnum field in fpu xml file introducing one useless number Jim Wilson (5): RISC-V: Add 32-bit gdb xml files. RISC-V: Add 64-bit gdb xml files. RISC-V: Fixes to CSR_* register macros. RISC-V: Add debug support for accessing CSRs. RISC-V: Add hooks to use the gdb xml files. configure | 2 + gdb-xml/riscv-32bit-cpu.xml | 47 ++++++ gdb-xml/riscv-32bit-csr.xml | 250 +++++++++++++++++++++++++++++++ gdb-xml/riscv-32bit-fpu.xml | 50 +++++++ gdb-xml/riscv-64bit-cpu.xml | 47 ++++++ gdb-xml/riscv-64bit-csr.xml | 250 +++++++++++++++++++++++++++++++ gdb-xml/riscv-64bit-fpu.xml | 56 +++++++ target/riscv/cpu.c | 9 +- target/riscv/cpu.h | 7 + target/riscv/cpu_bits.h | 35 ++++- target/riscv/csr.c | 32 +++- target/riscv/gdbstub.c | 350 ++++++++++++++++++++++++++++++++++++++++++-- 12 files changed, 1114 insertions(+), 21 deletions(-) create mode 100644 gdb-xml/riscv-32bit-cpu.xml create mode 100644 gdb-xml/riscv-32bit-csr.xml create mode 100644 gdb-xml/riscv-32bit-fpu.xml create mode 100644 gdb-xml/riscv-64bit-cpu.xml create mode 100644 gdb-xml/riscv-64bit-csr.xml create mode 100644 gdb-xml/riscv-64bit-fpu.xml