From patchwork Mon Jun 25 03:39:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Hoo X-Patchwork-Id: 934067 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41Dcmm5Ypvz9ryk for ; Mon, 25 Jun 2018 15:14:48 +1000 (AEST) Received: from localhost ([::1]:44267 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXJpu-0006Ce-CE for incoming@patchwork.ozlabs.org; Mon, 25 Jun 2018 01:14:46 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36626) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXIMJ-0001mG-Ho for qemu-devel@nongnu.org; Sun, 24 Jun 2018 23:40:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fXIMF-0007sc-0Y for qemu-devel@nongnu.org; Sun, 24 Jun 2018 23:40:07 -0400 Received: from mga17.intel.com ([192.55.52.151]:25151) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fXIME-0007qo-OB for qemu-devel@nongnu.org; Sun, 24 Jun 2018 23:40:02 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Jun 2018 20:39:54 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,268,1526367600"; d="scan'208";a="235277832" Received: from sqa-gate.sh.intel.com (HELO robert-ivt.tsp.org) ([10.239.48.212]) by orsmga005.jf.intel.com with ESMTP; 24 Jun 2018 20:39:46 -0700 From: Robert Hoo To: qemu-devel@nongnu.org, pbonzini@redhat.com, rth@twiddle.net, ehabkost@redhat.com Date: Mon, 25 Jun 2018 11:39:16 +0800 Message-Id: <1529897961-134132-1-git-send-email-robert.hu@linux.intel.com> X-Mailer: git-send-email 1.8.3.1 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.151 X-Mailman-Approved-At: Mon, 25 Jun 2018 01:13:50 -0400 Subject: [Qemu-devel] [PATCH 0/5] Add Icelake CPU model X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.hu@intel.com, Robert Hoo Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" This patch set defines the new guest CPU models of Icelake. The first patch adds support of IA32_PRED_CMD MSR (IBPB) and IA32_ARCH_CAPABILITIES MSR. Other patches add CPUID bits feature words for new features, like PCONFIG, WBNOINVD. The final patch defines Icelake-{Server,Client} CPU models. Robert Hoo (5): i386: Add support for IA32_PRED_CMD and IA32_ARCH_CAPABILITIES MSRs i386: Add CPUID bit and feature words for IA32_ARCH_CAPABILITIES MSR i386: Add CPUID bit for PCONFIG i386: Add CPUID bit for WBNOINVD i386: Add new CPU model Icelake-{Server,Client} target/i386/cpu.c | 122 ++++++++++++++++++++++++++++++++++++++++++++++++-- target/i386/cpu.h | 7 +++ target/i386/kvm.c | 27 ++++++++++- target/i386/machine.c | 40 +++++++++++++++++ 4 files changed, 192 insertions(+), 4 deletions(-)