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[0/5] Add Icelake CPU model

Message ID 1529897961-134132-1-git-send-email-robert.hu@linux.intel.com
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Series Add Icelake CPU model | expand

Message

Robert Hoo June 25, 2018, 3:39 a.m. UTC 
This patch set defines the new guest CPU models of Icelake.

The first patch adds support of IA32_PRED_CMD MSR (IBPB) and IA32_ARCH_CAPABILITIES MSR.
Other patches add CPUID bits feature words for new features, like PCONFIG,
WBNOINVD. The final patch defines Icelake-{Server,Client} CPU models.


Robert Hoo (5):
  i386: Add support for IA32_PRED_CMD and IA32_ARCH_CAPABILITIES MSRs
  i386: Add CPUID bit and feature words for IA32_ARCH_CAPABILITIES MSR
  i386: Add CPUID bit for PCONFIG
  i386: Add CPUID bit for WBNOINVD
  i386: Add new CPU model Icelake-{Server,Client}

 target/i386/cpu.c     | 122 ++++++++++++++++++++++++++++++++++++++++++++++++--
 target/i386/cpu.h     |   7 +++
 target/i386/kvm.c     |  27 ++++++++++-
 target/i386/machine.c |  40 +++++++++++++++++
 4 files changed, 192 insertions(+), 4 deletions(-)