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powerpc/64e: Define mmu_pte_psize static

Message ID beb30d280eaa5d857c38a0834b147dffd6b28aa9.1724157750.git.christophe.leroy@csgroup.eu (mailing list archive)
State Accepted
Commit d92b5cc29c792f1d3f0aaa3b29dddfe816c03e88
Headers show
Series powerpc/64e: Define mmu_pte_psize static | expand

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Commit Message

Christophe Leroy Aug. 20, 2024, 12:42 p.m. UTC
mmu_pte_psize is only used in the tlb_64e.c, define it static.

Fixes: 25d21ad6e799 ("powerpc: Add TLB management code for 64-bit Book3E")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202408011256.1O99IB0s-lkp@intel.com/
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
 arch/powerpc/mm/nohash/tlb_64e.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Michael Ellerman Aug. 27, 2024, 7:14 a.m. UTC | #1
On Tue, 20 Aug 2024 14:42:38 +0200, Christophe Leroy wrote:
> mmu_pte_psize is only used in the tlb_64e.c, define it static.
> 
> 

Applied to powerpc/fixes.

[1/1] powerpc/64e: Define mmu_pte_psize static
      https://git.kernel.org/powerpc/c/d92b5cc29c792f1d3f0aaa3b29dddfe816c03e88

cheers
diff mbox series

Patch

diff --git a/arch/powerpc/mm/nohash/tlb_64e.c b/arch/powerpc/mm/nohash/tlb_64e.c
index 113edf76d3ce..d26656b07b72 100644
--- a/arch/powerpc/mm/nohash/tlb_64e.c
+++ b/arch/powerpc/mm/nohash/tlb_64e.c
@@ -33,7 +33,7 @@ 
  * though this will probably be made common with other nohash
  * implementations at some point
  */
-int mmu_pte_psize;		/* Page size used for PTE pages */
+static int mmu_pte_psize;	/* Page size used for PTE pages */
 int mmu_vmemmap_psize;		/* Page size used for the virtual mem map */
 int book3e_htw_mode;		/* HW tablewalk?  Value is PPC_HTW_* */
 unsigned long linear_map_top;	/* Top of linear mapping */