Message ID | b07666d48fb89f80a86a18e498c7e1eac9a64aa1.1549253769.git.sandipan@linux.ibm.com (mailing list archive) |
---|---|
State | RFC |
Headers | show |
Series | powerpc: sstep: Emulation test infrastructure | expand |
Context | Check | Description |
---|---|---|
snowpatch_ozlabs/apply_patch | success | next/apply_patch Successfully applied |
snowpatch_ozlabs/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 9 lines checked |
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h index 19a8834e0398..9bc7dd6116a7 100644 --- a/arch/powerpc/include/asm/ppc-opcode.h +++ b/arch/powerpc/include/asm/ppc-opcode.h @@ -403,6 +403,9 @@ #define __PPC_CT(t) (((t) & 0x0f) << 21) #define __PPC_SPR(r) ((((r) & 0x1f) << 16) | ((((r) >> 5) & 0x1f) << 11)) #define __PPC_RC21 (0x1 << 10) +#define __PPC_D(d) ((d) & 0xffff) +#define __PPC_SI(i) __PPC_D(i) +#define __PPC_UI(i) __PPC_D(i) /* * Only use the larx hint bit on 64bit CPUs. e500v1/v2 based CPUs will treat a
This adds the bitmask definitions of D, SI and UI fields found in D-form instructions. Signed-off-by: Sandipan Das <sandipan@linux.ibm.com> --- arch/powerpc/include/asm/ppc-opcode.h | 3 +++ 1 file changed, 3 insertions(+)