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SRVR:AM3PR04MB1188; BCL:0; PCL:0; RULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(100000804101)(100110200095)(100000805101)(100110500095); SRVR:AM3PR04MB1188; x-forefront-prvs: 0373D94D15 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(6029001)(6009001)(39400400002)(39850400002)(39840400002)(39450400003)(39410400002)(39860400002)(13464003)(377454003)(8676002)(229853002)(14454004)(3280700002)(53936002)(8936002)(6506006)(5660300001)(7696004)(81166006)(7736002)(2906002)(74316002)(55016002)(6246003)(99286003)(9686003)(4326008)(25786009)(38730400002)(305945005)(6436002)(53546010)(6116002)(3846002)(189998001)(102836003)(33656002)(50986999)(2501003)(2950100002)(66066001)(2900100001)(76176999)(478600001)(54356999)(575784001)(3660700001)(86362001)(5250100002); DIR:OUT; SFP:1101; SCL:1; SRVR:AM3PR04MB1188; H:AM3PR04MB1185.eurprd04.prod.outlook.com; FPR:; SPF:None; MLV:sfv; LANG:en; spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-originalarrivaltime: 19 Jul 2017 06:44:30.5980 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM3PR04MB1188 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "oss@buserror.net" Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Hi Valentin, This patch you added make the compiling issue on armv8. Could you send another patch to resolve it? CC drivers/soc/samsung/pm_domains.o CC drivers/soc/sunxi/sunxi_sram.o CC drivers/soc/renesas/rcar-rst.o CC drivers/soc/fsl/qe/qe_io.o drivers/soc/fsl/qe/qe.c: In function 'qe_setbrg': drivers/soc/fsl/qe/qe.c:248:2: error: implicit declaration of function 'pvr_version_is' [-Werror=implicit-function-declaration] if (pvr_version_is(PVR_VER_836x) || pvr_version_is(PVR_VER_832x)) ^ CC drivers/soc/fsl/qe/ucc.o CC drivers/soc/renesas/rcar-sysc.o CHK kernel/config_data.h cc1: some warnings being treated as errors CC drivers/soc/tegra/fuse/fuse-tegra.o LD drivers/soc/rockchip/built-in.o CC drivers/soc/tegra/fuse/fuse-tegra30.o scripts/Makefile.build:302: recipe for target 'drivers/soc/fsl/qe/qe.o' failed make[4]: *** [drivers/soc/fsl/qe/qe.o] Error 1 -----Original Message----- From: Valentin Longchamp [mailto:valentin.longchamp@keymile.com] Sent: Friday, February 17, 2017 6:30 PM To: linuxppc-dev@lists.ozlabs.org; Qiang Zhao Cc: oss@buserror.net; Valentin Longchamp Subject: [PATCH 2/3] soc/fsl/qe: only apply QE_General4 workaround on affected SoCs The QE_General4 workaround is only valid for the MPC832x and MPC836x SoCs. The other SoCs that embed a QUICC engine are not affected by this hardware bug and thus can use the computed divisors (this was successfully tested on the T1040). Similalry to what was done in commit 8ce795cb0c6b ("i2c: mpc: assign the correct prescaler from SVR") in order to avoid changes in the device tree nodes of the QE (with maybe a variant of the compatible property), the PVR reg is read out to find out if the workaround must be applied or not. Signed-off-by: Valentin Longchamp --- drivers/soc/fsl/qe/qe.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) that the BRG divisor must be even if you're not using divide-by-16 mode. */ - if (!div16 && (divisor & 1) && (divisor > 3)) - divisor++; + if (pvr_version_is(PVR_VER_836x) || pvr_version_is(PVR_VER_832x)) + if (!div16 && (divisor & 1) && (divisor > 3)) + divisor++; tempval = ((divisor - 1) << QE_BRGC_DIVISOR_SHIFT) | QE_BRGC_ENABLE | div16; -- 1.8.3.1 diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c index 03874df..b66157fc 100644 --- a/drivers/soc/fsl/qe/qe.c +++ b/drivers/soc/fsl/qe/qe.c @@ -202,6 +202,9 @@ unsigned int qe_get_brg_clk(void) } EXPORT_SYMBOL(qe_get_brg_clk); +#define PVR_VER_836x 0x8083 +#define PVR_VER_832x 0x8084 + /* Program the BRG to the given sampling rate and multiplier * * @brg: the BRG, QE_BRG1 - QE_BRG16 @@ -228,8 +231,9 @@ int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier) /* Errata QE_General4, which affects some MPC832x and MPC836x SOCs, says