From patchwork Wed Aug 24 09:31:21 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liu Gang X-Patchwork-Id: 111288 X-Patchwork-Delegate: galak@kernel.crashing.org Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id B8736B70B1 for ; Wed, 24 Aug 2011 19:31:47 +1000 (EST) Received: from AM1EHSOBE003.bigfish.com (am1ehsobe003.messaging.microsoft.com [213.199.154.206]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "Microsoft Secure Server Authority" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id 538B7B6F69 for ; Wed, 24 Aug 2011 19:31:34 +1000 (EST) Received: from mail63-am1-R.bigfish.com (10.3.201.250) by AM1EHSOBE003.bigfish.com (10.3.204.23) with Microsoft SMTP Server id 14.1.225.22; Wed, 24 Aug 2011 09:31:25 +0000 Received: from mail63-am1 (localhost.localdomain [127.0.0.1]) by mail63-am1-R.bigfish.com (Postfix) with ESMTP id BFC28AD809A; Wed, 24 Aug 2011 09:31:25 +0000 (UTC) X-SpamScore: -7 X-BigFish: VS-7(zz9371K542Mzz1202hz31iz8275bh8275dhz2dh2a8h668h839h8e2h8e3h944h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail63-am1 (localhost.localdomain [127.0.0.1]) by mail63-am1 (MessageSwitch) id 1314178285584950_16312; Wed, 24 Aug 2011 09:31:25 +0000 (UTC) Received: from AM1EHSMHS001.bigfish.com (unknown [10.3.201.242]) by mail63-am1.bigfish.com (Postfix) with ESMTP id 8A11D196804E; Wed, 24 Aug 2011 09:31:25 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by AM1EHSMHS001.bigfish.com (10.3.207.101) with Microsoft SMTP Server (TLS) id 14.1.225.22; Wed, 24 Aug 2011 09:31:25 +0000 Received: from 039-SN1MPN1-004.039d.mgd.msft.net ([169.254.6.226]) by 039-SN1MMR1-001.039d.mgd.msft.net ([10.84.1.13]) with mapi id 14.01.0323.002; Wed, 24 Aug 2011 04:31:22 -0500 From: Liu Gang-B34182 To: "'akpm@linux-foundation.org'" , "'linuxppc-dev@lists.ozlabs.org'" Subject: RE: [PATCH] fsl-rio: Correct IECSR register clear value Thread-Topic: [PATCH] fsl-rio: Correct IECSR register clear value Thread-Index: AQHMVbO3DaRxMqsGIEaz7VGBTmos+5Ur0CXg Date: Wed, 24 Aug 2011 09:31:21 +0000 Message-ID: <9A1C2A9ACC704641BC472A1588CE16470EC9C3@039-SN1MPN1-004.039d.mgd.msft.net> References: <1312798419-3912-1-git-send-email-b34182@freescale.com> In-Reply-To: <1312798419-3912-1-git-send-email-b34182@freescale.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.192.208.185] MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: Gala Kumar-B11780 , Li Yang-R58472 , Zang Roy-R61911 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Hi, Andrew, Thank you for applying the patch "[PATCH] rio: Use discovered bit to test if enumeration is complete "! So far the following patch "[PATCH] fsl-rio: Correct IECSR register clear value " has no comment or response. So could you please apply this patch into your tree? Thanks a lot! Regards, Liu Gang -----Original Message----- From: Liu Gang-B34182 Sent: Monday, August 08, 2011 6:14 PM To: linuxppc-dev@ozlabs.org Cc: akpm@linux-foundation.org; Li Yang-R58472; Gala Kumar-B11780; Zang Roy-R61911; Liu Gang-B34182; Liu Gang-B34182 Subject: [PATCH] fsl-rio: Correct IECSR register clear value The RETE bit in IECSR is cleared by writing a 1 to it. Signed-off-by: Liu Gang --- arch/powerpc/sysdev/fsl_rio.c | 5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) -- 1.7.3.1 diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c index b3fd081..cdd765b 100644 --- a/arch/powerpc/sysdev/fsl_rio.c +++ b/arch/powerpc/sysdev/fsl_rio.c @@ -54,6 +54,7 @@ #define ODSR_CLEAR 0x1c00 #define LTLEECSR_ENABLE_ALL 0xFFC000FC #define ESCSR_CLEAR 0x07120204 +#define IECSR_CLEAR 0x80000000 #define RIO_PORT1_EDCSR 0x0640 #define RIO_PORT2_EDCSR 0x0680 @@ -1089,11 +1090,11 @@ static void port_error_handler(struct rio_mport *port, int offset) if (offset == 0) { out_be32((u32 *)(rio_regs_win + RIO_PORT1_EDCSR), 0); - out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), 0); + out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), IECSR_CLEAR); out_be32((u32 *)(rio_regs_win + RIO_ESCSR), ESCSR_CLEAR); } else { out_be32((u32 *)(rio_regs_win + RIO_PORT2_EDCSR), 0); - out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), 0); + out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), IECSR_CLEAR); out_be32((u32 *)(rio_regs_win + RIO_PORT2_ESCSR), ESCSR_CLEAR); } }