From patchwork Mon Jun 11 13:24:50 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bharat Bhushan X-Patchwork-Id: 164133 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id 2E7D0B704F for ; Mon, 11 Jun 2012 23:27:23 +1000 (EST) Received: from tx2outboundpool.messaging.microsoft.com (tx2ehsobe002.messaging.microsoft.com [65.55.88.12]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "Microsoft Secure Server Authority" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 0E857B7005 for ; Mon, 11 Jun 2012 23:26:23 +1000 (EST) Received: from mail252-tx2-R.bigfish.com (10.9.14.252) by TX2EHSOBE009.bigfish.com (10.9.40.29) with Microsoft SMTP Server id 14.1.225.23; Mon, 11 Jun 2012 13:25:20 +0000 Received: from mail252-tx2 (localhost [127.0.0.1]) by mail252-tx2-R.bigfish.com (Postfix) with ESMTP id 32A221B400E6; Mon, 11 Jun 2012 13:25:20 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: -6 X-BigFish: VS-6(zz9371I542M1432Izz1202hzz8275dhz2dh2a8h668h839h8e2h8e3h944hd25hf0ahbe9i) Received: from mail252-tx2 (localhost.localdomain [127.0.0.1]) by mail252-tx2 (MessageSwitch) id 1339421118116154_28675; Mon, 11 Jun 2012 13:25:18 +0000 (UTC) Received: from TX2EHSMHS026.bigfish.com (unknown [10.9.14.239]) by mail252-tx2.bigfish.com (Postfix) with ESMTP id 19DDB800045; Mon, 11 Jun 2012 13:25:18 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by TX2EHSMHS026.bigfish.com (10.9.99.126) with Microsoft SMTP Server (TLS) id 14.1.225.23; Mon, 11 Jun 2012 13:25:16 +0000 Received: from 039-SN2MPN1-022.039d.mgd.msft.net ([169.254.2.82]) by 039-SN1MMR1-002.039d.mgd.msft.net ([10.84.1.15]) with mapi id 14.02.0298.005; Mon, 11 Jun 2012 08:24:51 -0500 From: Bhushan Bharat-R65777 To: Jia Hongtao-B38951 , "linuxppc-dev@lists.ozlabs.org" , "galak@kernel.crashing.org" Subject: RE: [PATCH 0/6] Description for PCI patches using platform driver Thread-Topic: [PATCH 0/6] Description for PCI patches using platform driver Thread-Index: AQHNRV2AFMzPitMhHU62kZLUXDMNpJbwPMHggASBYwCAAFoBIA== Date: Mon, 11 Jun 2012 13:24:50 +0000 Message-ID: <6A3DF150A5B70D4F9B66A25E3F7C888D03D78FAE@039-SN2MPN1-022.039d.mgd.msft.net> References: <1339148527-16911-1-git-send-email-B38951@freescale.com> <6A3DF150A5B70D4F9B66A25E3F7C888D03D71F38@039-SN2MPN1-022.039d.mgd.msft.net> <412C8208B4A0464FA894C5F0C278CD5D01A0921B@039-SN1MPN1-002.039d.mgd.msft.net> In-Reply-To: <412C8208B4A0464FA894C5F0C278CD5D01A0921B@039-SN1MPN1-002.039d.mgd.msft.net> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.214.249.116] MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: Li Yang-R58472 , Wood Scott-B07421 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.15rc1 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" > -----Original Message----- > From: Jia Hongtao-B38951 > Sent: Monday, June 11, 2012 8:03 AM > To: Bhushan Bharat-R65777; linuxppc-dev@lists.ozlabs.org; > galak@kernel.crashing.org > Cc: Li Yang-R58472; benh@kernel.crashing.org; Wood Scott-B07421 > Subject: RE: [PATCH 0/6] Description for PCI patches using platform driver > > > -----Original Message----- > > From: Bhushan Bharat-R65777 > > Sent: Friday, June 08, 2012 6:47 PM > > To: Jia Hongtao-B38951; linuxppc-dev@lists.ozlabs.org; > > galak@kernel.crashing.org > > Cc: Li Yang-R58472; benh@kernel.crashing.org; Wood Scott-B07421 > > Subject: RE: [PATCH 0/6] Description for PCI patches using platform > > driver > > > > > > > -----Original Message----- > > > From: Jia Hongtao-B38951 > > > Sent: Friday, June 08, 2012 3:12 PM > > > To: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org > > > Cc: Li Yang-R58472; benh@kernel.crashing.org; Wood Scott-B07421; > > Bhushan Bharat- > > > R65777; Jia Hongtao-B38951 > > > Subject: [PATCH 0/6] Description for PCI patches using platform > > > driver > > > > > > This series of patches are to unify pci initialization code and add > > > PM > > support > > > for all 85xx/86xx powerpc boards. But two side effects are > > > introduced > > by this > > > mechanism which listed below: > > > > > > 1. of_platform_bus_probe() will be called twice but in some cases > > duplication > > > warning occured. We fix this in [PATCH 5/6]. > > > > > > 2. Edac driver failed to register pci nodes as platform devices. We > > > fix > > this > > > in [PATCH 6/6]. > > > > With these patches will not the SWIOTLB will not be initialized even > > if PCI/PCIe demanded? > > > > Thanks > > -Bharat > > > > These patches still have the swiotlb init problem if "ppc_swiotlb_enable" is > only demanded by PCI/PCIe. One of the purposes of sending out these patches is > to let us start a discussion for this problem in upstream. Ok, I did not find any mention of that, so I thought that you have resolved the issue by some means in these patches which I did not catch. So, these patches introduces the issue, that SWIOTLB will not be initialized if requested by pci/pcie. The request is raised by setting the flag ppc_swiotlb_enable. The swiotlb_init() will be called in mem_init() if ppc_swiotlb_enable is set. Now with these patches, the request is raised after mem_init() is called. So request not handled :). Following are the solutions we have thought of during our internal discussions (if I did not missed any): 1. These patches move the code from platform init to device init (arch_initcall()). Rather than moving the whole code, let us divide the code into two. First, which is needed to raise the swiotlb init request and second the rest. Define this first as an function in arch/powerpc/sysdev/fsl_pci.c and call this from platform init code of the SOCs. 2. All known devices, the lowest PCIe outbound range starts at 0x80000000, but there's nothing above 0xc0000000. So the inbound of size 0x8000_0000 is always availbe on all devices. Hardcode the check in platform code to check memblock_end_of_DRAM() to 0x80000000. Something like this: 3. Always do swiotlb_init() in mem_init() and later after PCI init, if the swiotlb is not needed then free it (swiotlb_free()). 4. etc, please provide some other better way. Thanks -Bharat diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c b/arch/powerpc/platforms/85xx/corenet_ds.c index 1f7028e..ef4e215 100644 --- a/arch/powerpc/platforms/85xx/corenet_ds.c +++ b/arch/powerpc/platforms/85xx/corenet_ds.c @@ -79,7 +79,7 @@ void __init corenet_ds_setup_arch(void) #endif #ifdef CONFIG_SWIOTLB - if (memblock_end_of_DRAM() > 0xffffffff) + if (memblock_end_of_DRAM() > 0xff000000) ppc_swiotlb_enable = 1; #endif pr_info("%s board from Freescale Semiconductor\n", ppc_md.name); -------------