From patchwork Tue Jan 18 00:52:24 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Meador Inge X-Patchwork-Id: 79241 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from bilbo.ozlabs.org (localhost [127.0.0.1]) by ozlabs.org (Postfix) with ESMTP id 90097B751A for ; Tue, 18 Jan 2011 11:52:38 +1100 (EST) Received: from relay1.mentorg.com (relay1.mentorg.com [192.94.38.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "relay1.mentorg.com", Issuer "Entrust Certification Authority - L1B" (not verified)) by ozlabs.org (Postfix) with ESMTPS id D2A18B7133; Tue, 18 Jan 2011 11:52:29 +1100 (EST) Received: from svr-orw-fem-01.mgc.mentorg.com ([147.34.98.93]) by relay1.mentorg.com with esmtp id 1PezoB-0003IA-Ft from meador_inge@mentor.com ; Mon, 17 Jan 2011 16:52:27 -0800 Received: from na2-mail.mgc.mentorg.com ([134.86.114.213]) by svr-orw-fem-01.mgc.mentorg.com with Microsoft SMTPSVC(6.0.3790.4675); Mon, 17 Jan 2011 16:52:27 -0800 Received: from [172.30.88.32] ([172.30.88.32]) by na2-mail.mgc.mentorg.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 17 Jan 2011 17:52:26 -0700 Message-ID: <4D34E448.8000902@mentor.com> Date: Mon, 17 Jan 2011 18:52:24 -0600 From: Meador Inge User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.1.9pre) Gecko/20100217 Shredder/3.0.3pre MIME-Version: 1.0 To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH 1/2] powerpc: document the MPIC device tree binding X-OriginalArrivalTime: 18 Jan 2011 00:52:26.0215 (UTC) FILETIME=[F984CF70:01CBB6A9] Cc: minge , devicetree-discuss@lists.ozlabs.org, "Blanchard, Hollis" X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org This binding documents several properties that have been in use for quite some time, and adds one new property 'no-reset', which controls whether the MPIC should be reset during runtime initialization. Signed-off-by: Meador Inge CC: Hollis Blanchard --- Documentation/powerpc/dts-bindings/mpic.txt | 78 +++++++++++++++++++++++++++ 1 files changed, 78 insertions(+), 0 deletions(-) create mode 100644 Documentation/powerpc/dts-bindings/mpic.txt + }; + +* References + +[1] PowerPC Microprocessor Common Hardware Reference Platform (CHRP) Binding, + Version 1.8, 1998. Published by the Open Firmware Working Group. + (http://playground.sun.com/1275/bindings/chrp/chrp1_8a.ps) +[2] Open Firmware Recommended Practice: Interrupt Mapping, Version 0.9. 1996. + Published by the Open Firmware Working Group. + (http://playground.sun.com/1275/practice/imap/imap0_9d.pdf) + -- 1.6.3.3 diff --git a/Documentation/powerpc/dts-bindings/mpic.txt b/Documentation/powerpc/dts-bindings/mpic.txt new file mode 100644 index 0000000..3a67919 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/mpic.txt @@ -0,0 +1,78 @@ +* MPIC Binding + +This binding specifies what properties and child nodes must be available on +the device tree representation of the "MPIC" interrupt controller. This +binding is based on the binding defined for Open PIC in [1] and is a superset +of that binding. + +** Required properties: + + NOTE: Many of these descriptions were paraphrased from [1] to aid + readability. + + - name : Specifies the name of the MPIC. + - device_type : Specifies the device type of this MPIC. The value of this + property shall be "open-pic". + - reg : Specifies the base physical address(s) and size(s) of this MPIC's + addressable register space. + - compatible : Specifies the compatibility list for the MPIC. The property + value shall include "chrp,open-pic". + - interrupt-controller : The presence of this property identifies the node + as a MPIC. No property value should be defined. + - #address-cells : Specifies the number of cells needed to encode an + address. The value of this property shall always be 0 + so that 'interrupt-map' nodes do not have to specify a + parent unit address. + - #interrupt-cells : Specifies the number of cells needed to encode an + interrupt source. + +** Optional properties: + + - no-reset : The presence of this property indicates that the MPIC + should not be reset during runtime initialization. + - protected-sources : Specifies a list of interrupt sources that are not + available for use and whose corresponding vectors + should not be initialized. A typical use case for + this property is in AMP systems where multiple + independent operating systems need to share the MPIC + without clobbering each other. + +** Example: + + mpic: pic@40000 { + // This is an interrupt controller node. + interrupt-controller; + + // No address cells so that 'interrupt-map' nodes which reference + // this MPIC node do not need a parent address specifier. + #address-cells = <0>; + + // Two cell to encode interrupt sources. + #interrupt-cells = <2>; + + // Offset address of 0x40000 and size of 0x40000. + reg = <0x40000 0x40000>; + + // Compatible with Open PIC. + compatible = "chrp,open-pic"; + + // An Open PIC device. + device_type = "open-pic"; + + // The sources 0xb1 and 0xb2 are off limits for use and should not be + // initialized by the OS. + protected-sources = <0xb1 0xb2>; + + // The MPIC should not be reset. + no-reset;