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Mon, 29 Nov 2021 17:47:14 +0000 (GMT) Received: from b01ledav001.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E20702805A; Mon, 29 Nov 2021 17:47:13 +0000 (GMT) Received: from localhost.localdomain (unknown [9.160.7.253]) by b01ledav001.gho.pok.ibm.com (Postfix) with ESMTP; Mon, 29 Nov 2021 17:47:13 +0000 (GMT) Message-ID: <3d2eb6e197c6c7908d938126ef46ac0e7dabfd09.camel@linux.ibm.com> Subject: [PATCH 02/10] powerpc/pseries/vas: Add notifier for DLPAR core removal/add From: Haren Myneni To: mpe@ellerman.id.au, linuxppc-dev@lists.ozlabs.org, npiggin@gmail.com Date: Mon, 29 Nov 2021 09:47:11 -0800 In-Reply-To: References: User-Agent: Evolution 3.36.5 (3.36.5-2.fc32) MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 5Ffd10JMESGU3i75WGSnXrnPM9B1m3nQ X-Proofpoint-ORIG-GUID: ii56K9xiRn5aNqcI08UMejU_jK9kLxgS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-11-29_10,2021-11-28_01,2020-04-07_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 lowpriorityscore=0 malwarescore=0 priorityscore=1501 adultscore=0 mlxscore=0 suspectscore=0 impostorscore=0 clxscore=1015 spamscore=0 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2111290082 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" The hypervisor assigns credits for each LPAR based on number of cores configured in that system. So expects to release credits (means windows) when the core is removed. This patch adds notifier for core removal/add so that the OS closes windows if the system looses credits due to core removal and reopen windows when the credits available later. Signed-off-by: Haren Myneni --- arch/powerpc/platforms/pseries/vas.c | 34 ++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/powerpc/platforms/pseries/vas.c b/arch/powerpc/platforms/pseries/vas.c index ecdd21f517c0..04a6eee2301e 100644 --- a/arch/powerpc/platforms/pseries/vas.c +++ b/arch/powerpc/platforms/pseries/vas.c @@ -531,6 +531,36 @@ static int get_vas_capabilities(u8 feat, enum vas_cop_feat_type type, return 0; } +/* + * Total number of default credits available (target_credits) + * in LPAR depends on number of cores configured. It varies based on + * whether processors are in shared mode or dedicated mode. + * Get the notifier when CPU configuration is changed with DLPAR + * operation so that get the new target_credits (vas default capabilities) + * and then update the existing windows usage if needed. + */ +static int pseries_vas_notifier(struct notifier_block *nb, + unsigned long action, void *data) +{ + struct of_reconfig_data *rd = data; + struct device_node *dn = rd->dn; + const __be32 *intserv; + int len, rc = 0; + + intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s", &len); + /* + * Processor config is not changed + */ + if (!intserv) + return NOTIFY_OK; + + return rc; +} + +static struct notifier_block pseries_vas_nb = { + .notifier_call = pseries_vas_notifier, +}; + static int __init pseries_vas_init(void) { struct hv_vas_cop_feat_caps *hv_cop_caps; @@ -584,6 +614,10 @@ static int __init pseries_vas_init(void) goto out_cop; } + /* Processors can be added/removed only on LPAR */ + if (copypaste_feat && firmware_has_feature(FW_FEATURE_LPAR)) + of_reconfig_notifier_register(&pseries_vas_nb); + pr_info("GZIP feature is available\n"); out_cop: