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Tue, 8 Oct 2024 20:26:24 +0000 (UTC) Received: from bvanassche.mtv.corp.google.com (unknown [104.135.204.82]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: bvanassche@acm.org) by 008.lax.mailroute.net (Postfix) with ESMTPSA id 4XNSGQ4TP7z6ClY9Q; Tue, 8 Oct 2024 20:26:22 +0000 (UTC) From: Bart Van Assche To: Thomas Gleixner Cc: Greg Kroah-Hartman , Russell King , linux-kernel@vger.kernel.org, Bart Van Assche , linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 04/22] powerpc/cell: Switch to irq_get_nr_irqs() Date: Tue, 8 Oct 2024 13:25:43 -0700 Message-ID: <20241008202601.3737326-5-bvanassche@acm.org> X-Mailer: git-send-email 2.47.0.rc0.187.ge670bccf7e-goog In-Reply-To: <20241008202601.3737326-1-bvanassche@acm.org> References: <20241008202601.3737326-1-bvanassche@acm.org> X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Post: List-Subscribe: , , List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_PASS,SPF_PASS autolearn=disabled version=4.0.0 X-Spam-Checker-Version: SpamAssassin 4.0.0 (2022-12-13) on lists.ozlabs.org Use the irq_get_nr_irqs() function instead of the global variable 'nr_irqs'. This patch prepares for changing 'nr_irqs' from an exported global variable into a variable with file scope. Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Bart Van Assche --- arch/powerpc/platforms/cell/axon_msi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c index 28dc86744cac..d243f7fd8982 100644 --- a/arch/powerpc/platforms/cell/axon_msi.c +++ b/arch/powerpc/platforms/cell/axon_msi.c @@ -112,7 +112,7 @@ static void axon_msi_cascade(struct irq_desc *desc) pr_devel("axon_msi: woff %x roff %x msi %x\n", write_offset, msic->read_offset, msi); - if (msi < nr_irqs && irq_get_chip_data(msi) == msic) { + if (msi < irq_get_nr_irqs() && irq_get_chip_data(msi) == msic) { generic_handle_irq(msi); msic->fifo_virt[idx] = cpu_to_le32(0xffffffff); } else {