Message ID | 20240511075344.1393631-1-anjalik@linux.ibm.com (mailing list archive) |
---|---|
State | Changes Requested |
Headers | show |
Series | powerpc/perf: set cpumode flags using sample address in the PPMU_ARCH_31 case | expand |
Context | Check | Description |
---|---|---|
snowpatch_ozlabs/github-powerpc_ppctests | success | Successfully ran 8 jobs. |
snowpatch_ozlabs/github-powerpc_selftests | success | Successfully ran 8 jobs. |
snowpatch_ozlabs/github-powerpc_sparse | fail | sparse (ppc64le, ppc64le, fedora-38) failed at step Build. |
snowpatch_ozlabs/github-powerpc_kernel_qemu | fail | kernel (g5_defconfig, fedora-38, /linux/arch/powerpc/configs/g5-qemu.config) failed at step Build. |
snowpatch_ozlabs/github-powerpc_clang | success | Successfully ran 6 jobs. |
Hi Anjali,
kernel test robot noticed the following build warnings:
[auto build test WARNING on dd5a440a31fae6e459c0d6271dddd62825505361]
url: https://github.com/intel-lab-lkp/linux/commits/Anjali-K/powerpc-perf-set-cpumode-flags-using-sample-address-in-the-PPMU_ARCH_31-case/20240511-202416
base: dd5a440a31fae6e459c0d6271dddd62825505361
patch link: https://lore.kernel.org/r/20240511075344.1393631-1-anjalik%40linux.ibm.com
patch subject: [PATCH] powerpc/perf: set cpumode flags using sample address in the PPMU_ARCH_31 case
config: powerpc-allmodconfig (https://download.01.org/0day-ci/archive/20240512/202405121056.KfeNJMXV-lkp@intel.com/config)
compiler: powerpc64-linux-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240512/202405121056.KfeNJMXV-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202405121056.KfeNJMXV-lkp@intel.com/
All warnings (new ones prefixed by >>):
arch/powerpc/perf/core-book3s.c: In function 'perf_get_misc_flags':
>> arch/powerpc/perf/core-book3s.c:270:13: warning: unused variable 'marked' [-Wunused-variable]
270 | int marked = mmcra & MMCRA_SAMPLE_ENABLE;
| ^~~~~~
vim +/marked +270 arch/powerpc/perf/core-book3s.c
1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 265
98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 266 static inline u32 perf_get_misc_flags(struct pt_regs *regs)
98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 267 {
33904054b40832 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-04-25 268 bool use_siar = regs_use_siar(regs);
d9f7088dd6d885 arch/powerpc/perf/core-book3s.c Athira Rajeev 2020-10-21 269 unsigned long mmcra = regs->dsisr;
d9f7088dd6d885 arch/powerpc/perf/core-book3s.c Athira Rajeev 2020-10-21 @270 int marked = mmcra & MMCRA_SAMPLE_ENABLE;
c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 271 unsigned long siar = mfspr(SPRN_SIAR);
c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 272 unsigned long addr;
98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 273
75382aa72f0682 arch/powerpc/perf/core-book3s.c Anton Blanchard 2012-06-26 274 if (!use_siar)
1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 275 return perf_flags_from_msr(regs);
1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 276
1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 277 /*
1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 278 * If we don't have flags in MMCRA, rather than using
1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 279 * the MSR, we intuit the flags from the address in
1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 280 * SIAR which should give slightly more reliable
1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 281 * results
1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 282 */
cbda6aa10bd2d9 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-05-15 283 if (ppmu->flags & PPMU_NO_SIPR) {
a2391b35f1d9d5 arch/powerpc/perf/core-book3s.c Madhavan Srinivasan 2016-12-24 284 if (is_kernel_addr(siar))
1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 285 return PERF_RECORD_MISC_KERNEL;
1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 286 return PERF_RECORD_MISC_USER;
1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 287 }
98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 288
7abb840b496f83 arch/powerpc/kernel/perf_event.c Michael Neuling 2009-10-14 289 /* PR has priority over HV, so order below is important */
c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 290 if (regs_sipr(regs)) {
c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 291 if (!(ppmu->flags & PPMU_ARCH_31))
7abb840b496f83 arch/powerpc/kernel/perf_event.c Michael Neuling 2009-10-14 292 return PERF_RECORD_MISC_USER;
c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 293 } else if (regs_sihv(regs) && (freeze_events_kernel != MMCR0_FCHV))
cdd6c482c9ff9c arch/powerpc/kernel/perf_event.c Ingo Molnar 2009-09-21 294 return PERF_RECORD_MISC_HYPERVISOR;
5682c460264149 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-04-25 295
c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 296 /*
c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 297 * Check the address in SIAR to identify the
c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 298 * privilege levels since the SIER[MSR_HV, MSR_PR]
c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 299 * bits are not set correctly in power10 sometimes
c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 300 */
c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 301 if (ppmu->flags & PPMU_ARCH_31) {
c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 302 addr = siar ? siar : regs->nip;
c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 303 if (!is_kernel_addr(addr))
c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 304 return PERF_RECORD_MISC_USER;
c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 305 }
c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 306
7abb840b496f83 arch/powerpc/kernel/perf_event.c Michael Neuling 2009-10-14 307 return PERF_RECORD_MISC_KERNEL;
98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 308 }
98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 309
On 12/05/24 07:52, kernel test robot wrote: > Hi Anjali, > > kernel test robot noticed the following build warnings: > > [auto build test WARNING on dd5a440a31fae6e459c0d6271dddd62825505361] > > url:https://github.com/intel-lab-lkp/linux/commits/Anjali-K/powerpc-perf-set-cpumode-flags-using-sample-address-in-the-PPMU_ARCH_31-case/20240511-202416 > base: dd5a440a31fae6e459c0d6271dddd62825505361 > patch link:https://lore.kernel.org/r/20240511075344.1393631-1-anjalik%40linux.ibm.com > patch subject: [PATCH] powerpc/perf: set cpumode flags using sample address in the PPMU_ARCH_31 case > config: powerpc-allmodconfig (https://download.01.org/0day-ci/archive/20240512/202405121056.KfeNJMXV-lkp@intel.com/config) > compiler: powerpc64-linux-gcc (GCC) 13.2.0 > reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240512/202405121056.KfeNJMXV-lkp@intel.com/reproduce) > > If you fix the issue in a separate patch/commit (i.e. not just a new version of > the same patch/commit), kindly add following tags > | Reported-by: kernel test robot<lkp@intel.com> > | Closes:https://lore.kernel.org/oe-kbuild-all/202405121056.KfeNJMXV-lkp@intel.com/ > > All warnings (new ones prefixed by >>): > > arch/powerpc/perf/core-book3s.c: In function 'perf_get_misc_flags': >>> arch/powerpc/perf/core-book3s.c:270:13: warning: unused variable 'marked' [-Wunused-variable] > 270 | int marked = mmcra & MMCRA_SAMPLE_ENABLE; > | ^~~~~~ Thank you for reporting the build warning. I will fix the same and send the patch as v2. > vim +/marked +270 arch/powerpc/perf/core-book3s.c > > 1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 265 > 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 266 static inline u32 perf_get_misc_flags(struct pt_regs *regs) > 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 267 { > 33904054b40832 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-04-25 268 bool use_siar = regs_use_siar(regs); > d9f7088dd6d885 arch/powerpc/perf/core-book3s.c Athira Rajeev 2020-10-21 269 unsigned long mmcra = regs->dsisr; > d9f7088dd6d885 arch/powerpc/perf/core-book3s.c Athira Rajeev 2020-10-21 @270 int marked = mmcra & MMCRA_SAMPLE_ENABLE; > c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 271 unsigned long siar = mfspr(SPRN_SIAR); > c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 272 unsigned long addr; > 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 273 > 75382aa72f0682 arch/powerpc/perf/core-book3s.c Anton Blanchard 2012-06-26 274 if (!use_siar) > 1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 275 return perf_flags_from_msr(regs); > 1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 276 > 1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 277 /* > 1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 278 * If we don't have flags in MMCRA, rather than using > 1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 279 * the MSR, we intuit the flags from the address in > 1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 280 * SIAR which should give slightly more reliable > 1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 281 * results > 1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 282 */ > cbda6aa10bd2d9 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-05-15 283 if (ppmu->flags & PPMU_NO_SIPR) { > a2391b35f1d9d5 arch/powerpc/perf/core-book3s.c Madhavan Srinivasan 2016-12-24 284 if (is_kernel_addr(siar)) > 1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 285 return PERF_RECORD_MISC_KERNEL; > 1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 286 return PERF_RECORD_MISC_USER; > 1ce447b90f3e71 arch/powerpc/perf/core-book3s.c Benjamin Herrenschmidt 2012-03-26 287 } > 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 288 > 7abb840b496f83 arch/powerpc/kernel/perf_event.c Michael Neuling 2009-10-14 289 /* PR has priority over HV, so order below is important */ > c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 290 if (regs_sipr(regs)) { > c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 291 if (!(ppmu->flags & PPMU_ARCH_31)) > 7abb840b496f83 arch/powerpc/kernel/perf_event.c Michael Neuling 2009-10-14 292 return PERF_RECORD_MISC_USER; > c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 293 } else if (regs_sihv(regs) && (freeze_events_kernel != MMCR0_FCHV)) > cdd6c482c9ff9c arch/powerpc/kernel/perf_event.c Ingo Molnar 2009-09-21 294 return PERF_RECORD_MISC_HYPERVISOR; > 5682c460264149 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-04-25 295 > c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 296 /* > c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 297 * Check the address in SIAR to identify the > c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 298 * privilege levels since the SIER[MSR_HV, MSR_PR] > c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 299 * bits are not set correctly in power10 sometimes > c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 300 */ > c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 301 if (ppmu->flags & PPMU_ARCH_31) { > c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 302 addr = siar ? siar : regs->nip; > c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 303 if (!is_kernel_addr(addr)) > c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 304 return PERF_RECORD_MISC_USER; > c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 305 } > c1c4353f6493af arch/powerpc/perf/core-book3s.c Anjali K 2024-05-11 306 > 7abb840b496f83 arch/powerpc/kernel/perf_event.c Michael Neuling 2009-10-14 307 return PERF_RECORD_MISC_KERNEL; > 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 308 } > 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 309 >
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c index 6b5f8a94e7d8..dd0c23ebaf5a 100644 --- a/arch/powerpc/perf/core-book3s.c +++ b/arch/powerpc/perf/core-book3s.c @@ -268,29 +268,12 @@ static inline u32 perf_get_misc_flags(struct pt_regs *regs) bool use_siar = regs_use_siar(regs); unsigned long mmcra = regs->dsisr; int marked = mmcra & MMCRA_SAMPLE_ENABLE; + unsigned long siar = mfspr(SPRN_SIAR); + unsigned long addr; if (!use_siar) return perf_flags_from_msr(regs); - /* - * Check the address in SIAR to identify the - * privilege levels since the SIER[MSR_HV, MSR_PR] - * bits are not set for marked events in power10 - * DD1. - */ - if (marked && (ppmu->flags & PPMU_P10_DD1)) { - unsigned long siar = mfspr(SPRN_SIAR); - if (siar) { - if (is_kernel_addr(siar)) - return PERF_RECORD_MISC_KERNEL; - return PERF_RECORD_MISC_USER; - } else { - if (is_kernel_addr(regs->nip)) - return PERF_RECORD_MISC_KERNEL; - return PERF_RECORD_MISC_USER; - } - } - /* * If we don't have flags in MMCRA, rather than using * the MSR, we intuit the flags from the address in @@ -298,19 +281,29 @@ static inline u32 perf_get_misc_flags(struct pt_regs *regs) * results */ if (ppmu->flags & PPMU_NO_SIPR) { - unsigned long siar = mfspr(SPRN_SIAR); if (is_kernel_addr(siar)) return PERF_RECORD_MISC_KERNEL; return PERF_RECORD_MISC_USER; } /* PR has priority over HV, so order below is important */ - if (regs_sipr(regs)) - return PERF_RECORD_MISC_USER; - - if (regs_sihv(regs) && (freeze_events_kernel != MMCR0_FCHV)) + if (regs_sipr(regs)) { + if (!(ppmu->flags & PPMU_ARCH_31)) + return PERF_RECORD_MISC_USER; + } else if (regs_sihv(regs) && (freeze_events_kernel != MMCR0_FCHV)) return PERF_RECORD_MISC_HYPERVISOR; + /* + * Check the address in SIAR to identify the + * privilege levels since the SIER[MSR_HV, MSR_PR] + * bits are not set correctly in power10 sometimes + */ + if (ppmu->flags & PPMU_ARCH_31) { + addr = siar ? siar : regs->nip; + if (!is_kernel_addr(addr)) + return PERF_RECORD_MISC_USER; + } + return PERF_RECORD_MISC_KERNEL; }
Currently in some cases, when the sampled instruction address register latches to a specific address during sampling, there is an inconsistency in the privilege bits captured in the sampled event register. For example, a snippet from the perf report on a power10 system is: Overhead Address Command Shared Object Symbol ........ .................. ............ ................. ....................... 2.41% 0x7fff9f94a02c null_syscall [unknown] [k] 0x00007fff9f94a02c 2.20% 0x7fff9f94a02c null_syscall libc.so.6 [.] syscall perf_get_misc_flags() function looks at the privilege bits to return the corresponding flags to be used for the address symbol and this privilege bit details are read from the sampled event register. In the above snippet, address "0x00007fff9f94a02c" is shown as "k" (kernel) due to the inconsistent privilege bits captured in the sampled event register. To address this case, the proposed fix is to additionally check whether the sampled address is in the kernel area. Also since this fix is to address a specific case, the fix is included within the corresponding flag (PPMU_ARCH_31). Signed-off-by: Anjali K <anjalik@linux.ibm.com> --- arch/powerpc/perf/core-book3s.c | 41 ++++++++++++++------------------- 1 file changed, 17 insertions(+), 24 deletions(-) base-commit: dd5a440a31fae6e459c0d6271dddd62825505361