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[220.245.239.57]) by smtp.gmail.com with ESMTPSA id b16-20020a056a000a9000b006f4473daa38sm3480068pfl.128.2024.05.04.05.29.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 04 May 2024 05:29:55 -0700 (PDT) From: Nicholas Piggin To: Thomas Huth Subject: [kvm-unit-tests PATCH v9 17/31] powerpc: Add cpu_relax Date: Sat, 4 May 2024 22:28:23 +1000 Message-ID: <20240504122841.1177683-18-npiggin@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240504122841.1177683-1-npiggin@gmail.com> References: <20240504122841.1177683-1-npiggin@gmail.com> MIME-Version: 1.0 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , linuxppc-dev@lists.ozlabs.org, kvm@vger.kernel.org, Nicholas Piggin , Andrew Jones Errors-To: linuxppc-dev-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Add a cpu_relax variant that uses SMT priority nop instructions like Linux. This was split out of the SMP patch because it affects the sprs test case. Signed-off-by: Nicholas Piggin Reviewed-by: Thomas Huth --- lib/ppc64/asm/barrier.h | 1 + powerpc/sprs.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/lib/ppc64/asm/barrier.h b/lib/ppc64/asm/barrier.h index d2df29520..475434b6a 100644 --- a/lib/ppc64/asm/barrier.h +++ b/lib/ppc64/asm/barrier.h @@ -1,6 +1,7 @@ #ifndef _ASMPPC64_BARRIER_H_ #define _ASMPPC64_BARRIER_H_ +#define cpu_relax() asm volatile("or 1,1,1 ; or 2,2,2" ::: "memory") #define pause_short() asm volatile(".long 0x7c40003c" ::: "memory") #define mb() asm volatile("sync":::"memory") diff --git a/powerpc/sprs.c b/powerpc/sprs.c index de9e87a21..c5844985a 100644 --- a/powerpc/sprs.c +++ b/powerpc/sprs.c @@ -228,8 +228,8 @@ static const struct spr sprs_power_common[1024] = { [815] = { "TAR", 64, RW, }, [848] = { "IC", 64, HV_RW | OS_RO, SPR_ASYNC, }, [849] = { "VTB", 64, HV_RW | OS_RO, SPR_ASYNC, }, -[896] = { "PPR", 64, RW, }, -[898] = { "PPR32", 32, RW, }, +[896] = { "PPR", 64, RW, SPR_ASYNC, }, /* PPR(32) is changed by cpu_relax(), appears to be async */ +[898] = { "PPR32", 32, RW, SPR_ASYNC, }, [1023]= { "PIR", 32, OS_RO, SPR_ASYNC, }, /* Can't be virtualised, appears to be async */ };