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Mon, 27 Nov 2023 05:47:51 +0000 (GMT) Received: from smtpav01.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id F0BDE20063; Mon, 27 Nov 2023 05:47:50 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by smtpav01.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 27 Nov 2023 05:47:50 +0000 (GMT) Received: from socotra.ibm.com (unknown [9.177.95.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 5F1156030B; Mon, 27 Nov 2023 16:47:45 +1100 (AEDT) From: Rohan McLure To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH 1/3] asm-generic/mmiowb: Mark accesses to fix KCSAN warnings Date: Mon, 27 Nov 2023 16:46:45 +1100 Message-ID: <20231127054648.1205221-2-rmclure@linux.ibm.com> X-Mailer: git-send-email 2.43.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: JoqAe_INKR8gYxTud9ZZDa8boAmj5PJz X-Proofpoint-GUID: fEIiC46RUX2AIwzR7Hf-4F65T81nh_b9 X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-27_03,2023-11-22_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 impostorscore=0 mlxlogscore=589 clxscore=1011 phishscore=0 lowpriorityscore=0 malwarescore=0 adultscore=0 priorityscore=1501 mlxscore=0 spamscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311270039 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: elver@google.com, arnd@arndb.de, gautam@linux.ibm.com, Rohan McLure , npiggin@gmail.com, will@kernel.org Errors-To: linuxppc-dev-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Prior to this patch, data races are detectable by KCSAN of the following forms: [1] Asynchronous calls to mmiowb_set_pending() from an interrupt context or otherwise outside of a critical section [2] Interrupted critical sections, where the interrupt will itself acquire a lock In case [1], calling context does not need an mmiowb() call to be issued, otherwise it would do so itself. Such calls to mmiowb_set_pending() are either idempotent or no-ops. In case [2], irrespective of when the interrupt occurs, the interrupt will acquire and release its locks prior to its return, nesting_count will continue balanced. In the worst case, the interrupted critical section during a mmiowb_spin_unlock() call observes an mmiowb to be pending and afterward is interrupted, leading to an extraneous call to mmiowb(). This data race is clearly innocuous. Resolve KCSAN warnings of type [1] by means of READ_ONCE, WRITE_ONCE. As increments and decrements to nesting_count are balanced by interrupt contexts, resolve type [2] warnings by simply revoking instrumentation, with data_race() rather than READ_ONCE() and WRITE_ONCE(), the memory consistency semantics of plain-accesses will still lead to correct behaviour. Signed-off-by: Rohan McLure Reported-by: Michael Ellerman Reported-by: Gautam Menghani Tested-by: Gautam Menghani Acked-by: Arnd Bergmann --- Previously discussed here: https://lore.kernel.org/linuxppc-dev/20230510033117.1395895-4-rmclure@linux.ibm.com/ But pushed back due to affecting other architectures. Reissuing, to linuxppc-dev, as it does not enact a functional change. --- include/asm-generic/mmiowb.h | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/include/asm-generic/mmiowb.h b/include/asm-generic/mmiowb.h index 5698fca3bf56..f8c7c8a84e9e 100644 --- a/include/asm-generic/mmiowb.h +++ b/include/asm-generic/mmiowb.h @@ -37,25 +37,28 @@ static inline void mmiowb_set_pending(void) struct mmiowb_state *ms = __mmiowb_state(); if (likely(ms->nesting_count)) - ms->mmiowb_pending = ms->nesting_count; + WRITE_ONCE(ms->mmiowb_pending, ms->nesting_count); } static inline void mmiowb_spin_lock(void) { struct mmiowb_state *ms = __mmiowb_state(); - ms->nesting_count++; + + /* Increment need not be atomic. Nestedness is balanced over interrupts. */ + data_race(ms->nesting_count++); } static inline void mmiowb_spin_unlock(void) { struct mmiowb_state *ms = __mmiowb_state(); + u16 pending = READ_ONCE(ms->mmiowb_pending); - if (unlikely(ms->mmiowb_pending)) { - ms->mmiowb_pending = 0; + WRITE_ONCE(ms->mmiowb_pending, 0); + if (unlikely(pending)) mmiowb(); - } - ms->nesting_count--; + /* Decrement need not be atomic. Nestedness is balanced over interrupts. */ + data_race(ms->nesting_count--); } #else #define mmiowb_set_pending() do { } while (0)