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Tue, 17 Oct 2023 19:32:17 +0000 From: Frank Li To: manivannan.sadhasivam@linaro.org Subject: [PATCH v3 3/4] PCI: layerscape: Rename pf_* as pf_lut_* Date: Tue, 17 Oct 2023 15:31:44 -0400 Message-Id: <20231017193145.3198380-4-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231017193145.3198380-1-Frank.Li@nxp.com> References: <20231017193145.3198380-1-Frank.Li@nxp.com> X-ClientProxiedBy: BYAPR06CA0013.namprd06.prod.outlook.com (2603:10b6:a03:d4::26) To AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB4838:EE_|AS8PR04MB8948:EE_ X-MS-Office365-Filtering-Correlation-Id: f1183563-d7f1-44a0-08cf-08dbcf47c633 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: AyBtbEOrjvIVYNixKRh/G5C1XcLpiqW5H8imVVA9Pkpw02P2iUb2ZzbCBitmZfE28LUW+tlrpV+CSq2GmJDYPiHdWFjBgYFbSgM0/ZIIl2WYTkAGJPZNMo516ha24tQf9g/j8Ehfx2SoNxUnq4rj/qWkQ6PFEbYkdk5UcEnli2RG3mIJqeRouhCxABAePJMYcVJ8gm6skmzEf3FERbee2P66A2GBgs/QpVdGejkXqAwMm/CBDbVfhElWOcr0I1jYT4O3unZjfxxrmvZoiAa/gfNsh21w7aLthe3gQLUqp7crV5q7jTcZM8dmEdqlQPKiCiYKHCsXVQEmfWss/8BnnVqQg/pbGUnLBI2Oz9Jelmwop7x6SjGI471NIwX6hnvApWEjNXdP67BimFbc3XwwOGAyqHJPGqZpzZ01GQYBK8JMh6iRwEH0eUq0g6PQnKi+KqLwc7cnDFvgy9Lp9OOZ4/jOCdyMT39o+OePKT1SAwxxIshtuQXUl6y/c99qdfYK2kP3BdxHiIrdYw3H9TM619L13+z4+kSXimbaI4AffOiGUJmtuJ/G8laPMi6S3hFxSOho/E4PlNS5wS55YUn/cDv0K9wQb+MJuFWj2mH1qCBp7/n29fxun6Z8mcz3B5UF X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:AM6PR04MB4838.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230031)(376002)(396003)(366004)(346002)(136003)(39860400002)(230922051799003)(186009)(451199024)(1800799009)(64100799003)(6506007)(52116002)(6666004)(83380400001)(38350700005)(26005)(6512007)(2616005)(38100700002)(2906002)(86362001)(4326008)(6486002)(5660300002)(8676002)(36756003)(8936002)(41300700001)(66556008)(66946007)(316002)(66476007)(6916009)(7416002)(1076003)(478600001);DIR:OUT;SFP:1101; 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Rename it to avoid duplicate pf_* and lut_* in driver. Signed-off-by: Frank Li --- Notes: change from v1 to v3 - new patch at v3 drivers/pci/controller/dwc/pci-layerscape.c | 34 ++++++++++----------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-layerscape.c b/drivers/pci/controller/dwc/pci-layerscape.c index 6f47cfe146c44..4b663b20d8612 100644 --- a/drivers/pci/controller/dwc/pci-layerscape.c +++ b/drivers/pci/controller/dwc/pci-layerscape.c @@ -46,7 +46,7 @@ #define LS_PCIE_DRV_SCFG BIT(0) struct ls_pcie_drvdata { - const u32 pf_off; + const u32 pf_lut_off; const struct dw_pcie_host_ops *ops; int (*exit_from_l2)(struct dw_pcie_rp *pp); int flags; @@ -56,13 +56,13 @@ struct ls_pcie_drvdata { struct ls_pcie { struct dw_pcie *pci; const struct ls_pcie_drvdata *drvdata; - void __iomem *pf_base; + void __iomem *pf_lut_base; struct regmap *scfg; int index; bool big_endian; }; -#define ls_pcie_pf_readl_addr(addr) ls_pcie_pf_readl(pcie, addr) +#define ls_pcie_pf_lut_readl_addr(addr) ls_pcie_pf_lut_readl(pcie, addr) #define to_ls_pcie(x) dev_get_drvdata((x)->dev) static bool ls_pcie_is_bridge(struct ls_pcie *pcie) @@ -103,20 +103,20 @@ static void ls_pcie_fix_error_response(struct ls_pcie *pcie) iowrite32(PCIE_ABSERR_SETTING, pci->dbi_base + PCIE_ABSERR); } -static u32 ls_pcie_pf_readl(struct ls_pcie *pcie, u32 off) +static u32 ls_pcie_pf_lut_readl(struct ls_pcie *pcie, u32 off) { if (pcie->big_endian) - return ioread32be(pcie->pf_base + off); + return ioread32be(pcie->pf_lut_base + off); - return ioread32(pcie->pf_base + off); + return ioread32(pcie->pf_lut_base + off); } -static void ls_pcie_pf_writel(struct ls_pcie *pcie, u32 off, u32 val) +static void ls_pcie_pf_lut_writel(struct ls_pcie *pcie, u32 off, u32 val) { if (pcie->big_endian) - iowrite32be(val, pcie->pf_base + off); + iowrite32be(val, pcie->pf_lut_base + off); else - iowrite32(val, pcie->pf_base + off); + iowrite32(val, pcie->pf_lut_base + off); } static void ls_pcie_send_turnoff_msg(struct dw_pcie_rp *pp) @@ -126,11 +126,11 @@ static void ls_pcie_send_turnoff_msg(struct dw_pcie_rp *pp) u32 val; int ret; - val = ls_pcie_pf_readl(pcie, LS_PCIE_PF_MCR); + val = ls_pcie_pf_lut_readl(pcie, LS_PCIE_PF_MCR); val |= PF_MCR_PTOMR; - ls_pcie_pf_writel(pcie, LS_PCIE_PF_MCR, val); + ls_pcie_pf_lut_writel(pcie, LS_PCIE_PF_MCR, val); - ret = readx_poll_timeout(ls_pcie_pf_readl_addr, LS_PCIE_PF_MCR, + ret = readx_poll_timeout(ls_pcie_pf_lut_readl_addr, LS_PCIE_PF_MCR, val, !(val & PF_MCR_PTOMR), PCIE_PME_TO_L2_TIMEOUT_US/10, PCIE_PME_TO_L2_TIMEOUT_US); @@ -149,15 +149,15 @@ static int ls_pcie_exit_from_l2(struct dw_pcie_rp *pp) * Set PF_MCR_EXL2S bit in LS_PCIE_PF_MCR register for the link * to exit L2 state. */ - val = ls_pcie_pf_readl(pcie, LS_PCIE_PF_MCR); + val = ls_pcie_pf_lut_readl(pcie, LS_PCIE_PF_MCR); val |= PF_MCR_EXL2S; - ls_pcie_pf_writel(pcie, LS_PCIE_PF_MCR, val); + ls_pcie_pf_lut_writel(pcie, LS_PCIE_PF_MCR, val); /* * L2 exit timeout of 10ms is not defined in the specifications, * it was chosen based on empirical observations. */ - ret = readx_poll_timeout(ls_pcie_pf_readl_addr, LS_PCIE_PF_MCR, + ret = readx_poll_timeout(ls_pcie_pf_lut_readl_addr, LS_PCIE_PF_MCR, val, !(val & PF_MCR_EXL2S), 1000, 10000); @@ -245,7 +245,7 @@ static const struct ls_pcie_drvdata ls1021a_drvdata = { }; static const struct ls_pcie_drvdata layerscape_drvdata = { - .pf_off = 0xc0000, + .pf_lut_off = 0xc0000, .pm_support = true, .exit_from_l2 = ls_pcie_exit_from_l2, }; @@ -295,7 +295,7 @@ static int ls_pcie_probe(struct platform_device *pdev) pcie->big_endian = of_property_read_bool(dev->of_node, "big-endian"); - pcie->pf_base = pci->dbi_base + pcie->drvdata->pf_off; + pcie->pf_lut_base = pci->dbi_base + pcie->drvdata->pf_lut_off; if (pcie->drvdata->flags & LS_PCIE_DRV_SCFG) {