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(unknown [9.177.64.227]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id D3EC960129; Fri, 18 Nov 2022 11:22:10 +1100 (AEDT) From: Rohan McLure To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v5 2/5] powerpc: mm: Implement p{m,u,4}d_leaf on all platforms Date: Fri, 18 Nov 2022 00:21:43 +0000 Message-Id: <20221118002146.25979-2-rmclure@linux.ibm.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221118002146.25979-1-rmclure@linux.ibm.com> References: <20221118002146.25979-1-rmclure@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: rm_hzOrnXMGOQ2ELD43k46NZjfGh0IX1 X-Proofpoint-GUID: rm_hzOrnXMGOQ2ELD43k46NZjfGh0IX1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-17_06,2022-11-17_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 suspectscore=0 bulkscore=0 priorityscore=1501 phishscore=0 spamscore=0 adultscore=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 mlxlogscore=607 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211170170 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rohan McLure Errors-To: linuxppc-dev-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" The check that a higher-level entry in multi-level pages contains a page translation entry (pte) is performed by p{m,u,4}d_leaf stubs, which may be specialised for each choice of mmu. In a prior commit, we replace uses to the catch-all stubs, p{m,u,4}d_is_leaf with p{m,u,4}d_leaf. Replace the catch-all stub definitions for p{m,u,4}d_is_leaf with definitions for p{m,u,4}d_leaf. A future patch will assume that p{m,u,4}d_leaf is defined on all platforms. In particular, implement pud_leaf for Book3E-64, pmd_leaf for all Book3E and Book3S-64 platforms, with a catch-all definition for p4d_leaf. Signed-off-by: Rohan McLure --- v5: Split patch that replaces p{m,u,4}d_is_leaf into two patches, first replacing callsites and afterward providing generic definition. Remove ifndef-defines implementing p{m,u}d_leaf in favour of implementing stubs in headers belonging to the particular platforms needing them. --- arch/powerpc/include/asm/book3s/32/pgtable.h | 4 ++++ arch/powerpc/include/asm/book3s/64/pgtable.h | 8 ++----- arch/powerpc/include/asm/nohash/64/pgtable.h | 5 +++++ arch/powerpc/include/asm/nohash/pgtable.h | 5 +++++ arch/powerpc/include/asm/pgtable.h | 22 ++------------------ 5 files changed, 18 insertions(+), 26 deletions(-) diff --git a/arch/powerpc/include/asm/book3s/32/pgtable.h b/arch/powerpc/include/asm/book3s/32/pgtable.h index 75823f39e042..921ae95cd939 100644 --- a/arch/powerpc/include/asm/book3s/32/pgtable.h +++ b/arch/powerpc/include/asm/book3s/32/pgtable.h @@ -242,6 +242,10 @@ static inline void pmd_clear(pmd_t *pmdp) *pmdp = __pmd(0); } +static inline bool pmd_leaf(pmd_t pmd) +{ + return false; +} /* * When flushing the tlb entry for a page, we also need to flush the hash diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h index c436d8422654..9a6db4ad3228 100644 --- a/arch/powerpc/include/asm/book3s/64/pgtable.h +++ b/arch/powerpc/include/asm/book3s/64/pgtable.h @@ -1426,16 +1426,12 @@ static inline bool is_pte_rw_upgrade(unsigned long old_val, unsigned long new_va /* * Like pmd_huge() and pmd_large(), but works regardless of config options */ -#define pmd_is_leaf pmd_is_leaf -#define pmd_leaf pmd_is_leaf -static inline bool pmd_is_leaf(pmd_t pmd) +static inline bool pmd_leaf(pmd_t pmd) { return !!(pmd_raw(pmd) & cpu_to_be64(_PAGE_PTE)); } -#define pud_is_leaf pud_is_leaf -#define pud_leaf pud_is_leaf -static inline bool pud_is_leaf(pud_t pud) +static inline bool pud_leaf(pud_t pud) { return !!(pud_raw(pud) & cpu_to_be64(_PAGE_PTE)); } diff --git a/arch/powerpc/include/asm/nohash/64/pgtable.h b/arch/powerpc/include/asm/nohash/64/pgtable.h index 879e9a6e5a87..34e618bb9140 100644 --- a/arch/powerpc/include/asm/nohash/64/pgtable.h +++ b/arch/powerpc/include/asm/nohash/64/pgtable.h @@ -141,6 +141,11 @@ static inline void pud_clear(pud_t *pudp) *pudp = __pud(0); } +static inline bool pud_leaf(pud_t pud) +{ + return false; +} + #define pud_none(pud) (!pud_val(pud)) #define pud_bad(pud) (!is_kernel_addr(pud_val(pud)) \ || (pud_val(pud) & PUD_BAD_BITS)) diff --git a/arch/powerpc/include/asm/nohash/pgtable.h b/arch/powerpc/include/asm/nohash/pgtable.h index d9067dfc531c..455ae13822ee 100644 --- a/arch/powerpc/include/asm/nohash/pgtable.h +++ b/arch/powerpc/include/asm/nohash/pgtable.h @@ -60,6 +60,11 @@ static inline bool pte_hw_valid(pte_t pte) return pte_val(pte) & _PAGE_PRESENT; } +static inline bool pmd_leaf(pmd_t pmd) +{ + return false; +} + /* * Don't just check for any non zero bits in __PAGE_USER, since for book3e * and PTE_64BIT, PAGE_KERNEL_X contains _PAGE_BAP_SR which is also in diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h index 283f40d05a4d..68a3f271aebe 100644 --- a/arch/powerpc/include/asm/pgtable.h +++ b/arch/powerpc/include/asm/pgtable.h @@ -134,29 +134,11 @@ static inline void pte_frag_set(mm_context_t *ctx, void *p) } #endif -#ifndef pmd_is_leaf -#define pmd_is_leaf pmd_is_leaf -static inline bool pmd_is_leaf(pmd_t pmd) +#define p4d_leaf p4d_leaf +static inline bool p4d_leaf(p4d_t p4d) { return false; } -#endif - -#ifndef pud_is_leaf -#define pud_is_leaf pud_is_leaf -static inline bool pud_is_leaf(pud_t pud) -{ - return false; -} -#endif - -#ifndef p4d_is_leaf -#define p4d_is_leaf p4d_is_leaf -static inline bool p4d_is_leaf(p4d_t p4d) -{ - return false; -} -#endif #define pmd_pgtable pmd_pgtable static inline pgtable_t pmd_pgtable(pmd_t pmd)