Message ID | 20220419114828.89843-1-atrajeev@linux.vnet.ibm.com (mailing list archive) |
---|---|
State | Accepted |
Headers | show |
Series | [V3,1/2] powerpc/perf: Fix the power9 event alternatives array to have correct sort order | expand |
On Tue, 19 Apr 2022 17:18:27 +0530, Athira Rajeev wrote: > When scheduling a group of events, there are constraint checks > done to make sure all events can go in a group. Example, one of > the criteria is that events in a group cannot use same PMC. > But platform specific PMU supports alternative event for some > of the event codes. During perf_event_open, if any event > group doesn't match constraint check criteria, further lookup > is done to find alternative event. > > [...] Applied to powerpc/fixes. [1/2] powerpc/perf: Fix the power9 event alternatives array to have correct sort order https://git.kernel.org/powerpc/c/0dcad700bb2776e3886fe0a645a4bf13b1e747cd [2/2] powerpc/perf: Fix the power10 event alternatives array to have correct sort order https://git.kernel.org/powerpc/c/c6cc9a852f123301d5271f1484df8e961b2b64f1 cheers
diff --git a/arch/powerpc/perf/power9-pmu.c b/arch/powerpc/perf/power9-pmu.c index c9eb5232e68b..c393e837648e 100644 --- a/arch/powerpc/perf/power9-pmu.c +++ b/arch/powerpc/perf/power9-pmu.c @@ -133,11 +133,11 @@ int p9_dd22_bl_ev[] = { /* Table of alternatives, sorted by column 0 */ static const unsigned int power9_event_alternatives[][MAX_ALT] = { - { PM_INST_DISP, PM_INST_DISP_ALT }, - { PM_RUN_CYC_ALT, PM_RUN_CYC }, - { PM_RUN_INST_CMPL_ALT, PM_RUN_INST_CMPL }, - { PM_LD_MISS_L1, PM_LD_MISS_L1_ALT }, { PM_BR_2PATH, PM_BR_2PATH_ALT }, + { PM_INST_DISP, PM_INST_DISP_ALT }, + { PM_RUN_CYC_ALT, PM_RUN_CYC }, + { PM_LD_MISS_L1, PM_LD_MISS_L1_ALT }, + { PM_RUN_INST_CMPL_ALT, PM_RUN_INST_CMPL }, }; static int power9_get_alternatives(u64 event, unsigned int flags, u64 alt[])