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[10/20] selftest/powerpc/pmu/: Add interface test for mmcr0_cc56run field

Message ID 20220127072012.662451-11-kjain@linux.ibm.com (mailing list archive)
State Accepted
Headers show
Series Add perf sampling tests as part of selftest | expand

Commit Message

kajoljain Jan. 27, 2022, 7:20 a.m. UTC 
From: Athira Rajeev <atrajeev@linux.vnet.ibm.com>

The testcase uses event code 0x500fa ("instructions") to check
the CC56RUN bit setting in Monitor Mode Control Register 0(MMCR0).
In ISA v3.1 platform, this bit is expected to be set in MMCR0
when using Performance Monitor Counter 5 and 6 (PMC5 and PMC6).
Verify this is done correctly by perf interface.

CC56RUN bit makes PMC5 and PMC6 count regardless
of the run latch state. This bit is set in power10
since PMC5 and PMC6 is used in power10 for counting
instructions and cycles. Hence added a check to skip
this test in other platforms

Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
---
 .../powerpc/pmu/sampling_tests/Makefile       |  4 +-
 .../pmu/sampling_tests/mmcr0_cc56run_test.c   | 59 +++++++++++++++++++
 2 files changed, 61 insertions(+), 2 deletions(-)
 create mode 100644 tools/testing/selftests/powerpc/pmu/sampling_tests/mmcr0_cc56run_test.c
diff mbox series

Patch

diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile b/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile
index aee25c7037ac..9827bf20b90b 100644
--- a/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile
@@ -1,7 +1,7 @@ 
 # SPDX-License-Identifier: GPL-2.0
 include ../../../../../../scripts/Kbuild.include
 
-all: $(TEST_GEN_PROGS) mmcr0_exceptionbits_test.c
+all: $(TEST_GEN_PROGS) mmcr0_exceptionbits_test.c mmcr0_cc56run_test.c
 
 noarg:
 	$(MAKE) -C ../../
@@ -12,7 +12,7 @@  CFLAGS += -m64 -I../../../../../lib/
 no-pie-option := $(call try-run, echo 'int main() { return 0; }' | \
 	$(CC) -Werror $(KBUILD_CPPFLAGS) $(CC_OPTION_CFLAGS) -no-pie -x c - -o "$$TMP", -no-pie)
 
-TEST_GEN_PROGS := mmcr0_exceptionbits_test
+TEST_GEN_PROGS := mmcr0_exceptionbits_test mmcr0_cc56run_test
 
 LDFLAGS += $(no-pie-option)
 
diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcr0_cc56run_test.c b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcr0_cc56run_test.c
new file mode 100644
index 000000000000..da97676b56b2
--- /dev/null
+++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcr0_cc56run_test.c
@@ -0,0 +1,59 @@ 
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Athira Rajeev, IBM Corp.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+
+#include "../event.h"
+#include "misc.h"
+#include "utils.h"
+
+extern void thirty_two_instruction_loop(int loops);
+
+/*
+ * A perf sampling test for mmcr0
+ * field: cc56run.
+ */
+static int mmcr0_cc56run(void)
+{
+	struct event event;
+	u64 *intr_regs;
+
+	/* Check for platform support for the test */
+	SKIP_IF(check_pvr_for_sampling_tests());
+	SKIP_IF(!have_hwcap2(PPC_FEATURE2_ARCH_3_1));
+
+	 /* Init the event for the sampling test */
+	event_init_sampling(&event, 0x500fa);
+	event.attr.sample_regs_intr = platform_extended_mask;
+	FAIL_IF(event_open(&event));
+	event.mmap_buffer = event_sample_buf_mmap(event.fd, 1);
+
+	event_enable(&event);
+
+	/* workload to make the event overflow */
+	thirty_two_instruction_loop(10000);
+
+	event_disable(&event);
+
+	/* Check for sample count */
+	FAIL_IF(!collect_samples(event.mmap_buffer));
+
+	intr_regs = get_intr_regs(&event, event.mmap_buffer);
+
+	/* Check for intr_regs */
+	FAIL_IF(!intr_regs);
+
+	/* Verify that cc56run bit is set in MMCR0 */
+	FAIL_IF(!GET_MMCR_FIELD(0, get_reg_value(intr_regs, "MMCR0"), 5, cc56run));
+
+	event_close(&event);
+	return 0;
+}
+
+int main(void)
+{
+	FAIL_IF(test_harness(mmcr0_cc56run, "mmcr0_cc56run"));
+}