diff mbox series

[1/3] powerpc/64s: Mask NIP before checking against SRR0

Message ID 20211221135101.2085547-1-mpe@ellerman.id.au (mailing list archive)
State Accepted
Headers show
Series [1/3] powerpc/64s: Mask NIP before checking against SRR0 | expand

Commit Message

Michael Ellerman Dec. 21, 2021, 1:50 p.m. UTC
When CONFIG_PPC_RFI_SRR_DEBUG=y we check that NIP and SRR0 match when
returning from interrupts. This can trigger falsely if NIP has either of
its two low bits set via sigreturn or ptrace, while SRR0 has its low two
bits masked in hardware.

As a quick fix make sure to mask the low bits before doing the check.

Fixes: 59dc5bfca0cb ("powerpc/64s: avoid reloading (H)SRR registers if they are still valid")
Reported-by: Sachin Sant <sachinp@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
 arch/powerpc/kernel/interrupt_64.S | 2 ++
 1 file changed, 2 insertions(+)

Comments

Sachin Sant Dec. 22, 2021, 10:25 a.m. UTC | #1
> On 21-Dec-2021, at 7:20 PM, Michael Ellerman <mpe@ellerman.id.au> wrote:
> 
> When CONFIG_PPC_RFI_SRR_DEBUG=y we check that NIP and SRR0 match when
> returning from interrupts. This can trigger falsely if NIP has either of
> its two low bits set via sigreturn or ptrace, while SRR0 has its low two
> bits masked in hardware.
> 
> As a quick fix make sure to mask the low bits before doing the check.
> 
> Fixes: 59dc5bfca0cb ("powerpc/64s: avoid reloading (H)SRR registers if they are still valid")
> Reported-by: Sachin Sant <sachinp@linux.vnet.ibm.com>
> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
> ---

Tested this 3 patch series successfully (with and without PPC_RFI_SRR_DEBUG)
on Power9/Power10 LPAR as well as Power9 PowerNV. 

Tested-by: Sachin Sant <sachinp@linux.vnet.ibm.com>
Michael Ellerman Dec. 26, 2021, 9:52 p.m. UTC | #2
On Wed, 22 Dec 2021 00:50:59 +1100, Michael Ellerman wrote:
> When CONFIG_PPC_RFI_SRR_DEBUG=y we check that NIP and SRR0 match when
> returning from interrupts. This can trigger falsely if NIP has either of
> its two low bits set via sigreturn or ptrace, while SRR0 has its low two
> bits masked in hardware.
> 
> As a quick fix make sure to mask the low bits before doing the check.
> 
> [...]

Applied to powerpc/next.

[1/3] powerpc/64s: Mask NIP before checking against SRR0
      https://git.kernel.org/powerpc/c/314f6c23dd8d417281eb9e8a516dd98036f2e7b3
[2/3] powerpc/64s: Use EMIT_WARN_ENTRY for SRR debug warnings
      https://git.kernel.org/powerpc/c/fd1eaaaaa6864b5fb8f99880fcefb49760b8fe4e
[3/3] selftests/powerpc: Add a test of sigreturning to an unaligned address
      https://git.kernel.org/powerpc/c/beeac538c366cd2828092adecd1edab28326c55b

cheers
diff mbox series

Patch

diff --git a/arch/powerpc/kernel/interrupt_64.S b/arch/powerpc/kernel/interrupt_64.S
index 2ad223597ca2..4fd65d39d5d3 100644
--- a/arch/powerpc/kernel/interrupt_64.S
+++ b/arch/powerpc/kernel/interrupt_64.S
@@ -30,6 +30,7 @@ 
 	.ifc \srr,srr
 	mfspr	r11,SPRN_SRR0
 	ld	r12,_NIP(r1)
+	clrrdi  r12,r12,2
 100:	tdne	r11,r12
 	EMIT_BUG_ENTRY 100b,__FILE__,__LINE__,(BUGFLAG_WARNING | BUGFLAG_ONCE)
 	mfspr	r11,SPRN_SRR1
@@ -39,6 +40,7 @@ 
 	.else
 	mfspr	r11,SPRN_HSRR0
 	ld	r12,_NIP(r1)
+	clrrdi  r12,r12,2
 100:	tdne	r11,r12
 	EMIT_BUG_ENTRY 100b,__FILE__,__LINE__,(BUGFLAG_WARNING | BUGFLAG_ONCE)
 	mfspr	r11,SPRN_HSRR1