diff mbox series

[v3,13/18] powerpc/64e: remove mmu_linear_psize

Message ID 20211021223013.2641952-14-npiggin@gmail.com (mailing list archive)
State Superseded
Headers show
Series powerpc: Make hash MMU code build configurable | expand
Related show

Commit Message

Nicholas Piggin Oct. 21, 2021, 10:30 p.m. UTC
mmu_linear_psize is only set at boot once on 64e, is not necessarily
the correct size of the linear map pages, and is never used anywhere.
Remove it.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 arch/powerpc/mm/nohash/tlb.c | 9 ---------
 1 file changed, 9 deletions(-)

Comments

Christophe Leroy Oct. 22, 2021, 6:49 a.m. UTC | #1
Le 22/10/2021 à 00:30, Nicholas Piggin a écrit :
> mmu_linear_psize is only set at boot once on 64e, is not necessarily
> the correct size of the linear map pages, and is never used anywhere.
> Remove it.

mmu_linear_psize is defined as a macro in:

     arch/powerpc/include/asm/book3s/32/mmu-hash.h, line 152 (as a macro)
     arch/powerpc/include/asm/nohash/32/mmu-40x.h, line 66 (as a macro)
     arch/powerpc/include/asm/nohash/32/mmu-44x.h, line 150 (as a macro)
     arch/powerpc/include/asm/nohash/32/mmu-8xx.h, line 173 (as a macro)

Is that needed at all or should is be cleaned, if nothing else than 64s 
uses it ?

Otherwise, why not do the same with 64e and define it as a macro ? Maybe 
that would help minimising the amount of ifdefs.


> 
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
>   arch/powerpc/mm/nohash/tlb.c | 9 ---------
>   1 file changed, 9 deletions(-)
> 
> diff --git a/arch/powerpc/mm/nohash/tlb.c b/arch/powerpc/mm/nohash/tlb.c
> index 5872f69141d5..8c1523ae7f7f 100644
> --- a/arch/powerpc/mm/nohash/tlb.c
> +++ b/arch/powerpc/mm/nohash/tlb.c
> @@ -150,7 +150,6 @@ static inline int mmu_get_tsize(int psize)
>    */
>   #ifdef CONFIG_PPC64
>   
> -int mmu_linear_psize;		/* Page size used for the linear mapping */
>   int mmu_pte_psize;		/* Page size used for PTE pages */
>   int mmu_vmemmap_psize;		/* Page size used for the virtual mem map */
>   int book3e_htw_mode;		/* HW tablewalk?  Value is PPC_HTW_* */
> @@ -655,14 +654,6 @@ static void early_init_this_mmu(void)
>   
>   static void __init early_init_mmu_global(void)
>   {
> -	/* XXX This will have to be decided at runtime, but right
> -	 * now our boot and TLB miss code hard wires it. Ideally
> -	 * we should find out a suitable page size and patch the
> -	 * TLB miss code (either that or use the PACA to store
> -	 * the value we want)
> -	 */
> -	mmu_linear_psize = MMU_PAGE_1G;
> -
>   	/* XXX This should be decided at runtime based on supported
>   	 * page sizes in the TLB, but for now let's assume 16M is
>   	 * always there and a good fit (which it probably is)
>
Nicholas Piggin Oct. 22, 2021, 9:21 a.m. UTC | #2
Excerpts from Christophe Leroy's message of October 22, 2021 4:49 pm:
> 
> 
> Le 22/10/2021 à 00:30, Nicholas Piggin a écrit :
>> mmu_linear_psize is only set at boot once on 64e, is not necessarily
>> the correct size of the linear map pages, and is never used anywhere.
>> Remove it.
> 
> mmu_linear_psize is defined as a macro in:
> 
>      arch/powerpc/include/asm/book3s/32/mmu-hash.h, line 152 (as a macro)
>      arch/powerpc/include/asm/nohash/32/mmu-40x.h, line 66 (as a macro)
>      arch/powerpc/include/asm/nohash/32/mmu-44x.h, line 150 (as a macro)
>      arch/powerpc/include/asm/nohash/32/mmu-8xx.h, line 173 (as a macro)
> 
> Is that needed at all or should is be cleaned, if nothing else than 64s 
> uses it ?
> 
> Otherwise, why not do the same with 64e and define it as a macro ? Maybe 
> that would help minimising the amount of ifdefs.

I prefer to remove it entirely, to avoid situations like 64e where it 
was being used without understanding what the value really was.

32e can come in a later cleanup to avoid making this series any bigger.

Thanks,
Nick
diff mbox series

Patch

diff --git a/arch/powerpc/mm/nohash/tlb.c b/arch/powerpc/mm/nohash/tlb.c
index 5872f69141d5..8c1523ae7f7f 100644
--- a/arch/powerpc/mm/nohash/tlb.c
+++ b/arch/powerpc/mm/nohash/tlb.c
@@ -150,7 +150,6 @@  static inline int mmu_get_tsize(int psize)
  */
 #ifdef CONFIG_PPC64
 
-int mmu_linear_psize;		/* Page size used for the linear mapping */
 int mmu_pte_psize;		/* Page size used for PTE pages */
 int mmu_vmemmap_psize;		/* Page size used for the virtual mem map */
 int book3e_htw_mode;		/* HW tablewalk?  Value is PPC_HTW_* */
@@ -655,14 +654,6 @@  static void early_init_this_mmu(void)
 
 static void __init early_init_mmu_global(void)
 {
-	/* XXX This will have to be decided at runtime, but right
-	 * now our boot and TLB miss code hard wires it. Ideally
-	 * we should find out a suitable page size and patch the
-	 * TLB miss code (either that or use the PACA to store
-	 * the value we want)
-	 */
-	mmu_linear_psize = MMU_PAGE_1G;
-
 	/* XXX This should be decided at runtime based on supported
 	 * page sizes in the TLB, but for now let's assume 16M is
 	 * always there and a good fit (which it probably is)