| Message ID | 20210930122055.1390-4-atrajeev@linux.vnet.ibm.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | powerpc/perf: Add instruction and data address registers to extended regs | expand |
| Related | show |
Athira Rajeev <atrajeev@linux.vnet.ibm.com> writes: > Patch adds support to include Sampled Instruction Address Register This is a nit and doesn't require a new revision, but I think this should read "Include Sampled Instruction Address ...", not "Patch adds support to include Sampled Instruction ..." - see https://www.kernel.org/doc/html/v5.11/process/submitting-patches.html#describe-your-changes > (SIAR) and Sampled Data Address Register (SDAR) SPRs as part of extended > registers. Update the definition of PERF_REG_PMU_MASK_300/31 and > PERF_REG_EXTENDED_MAX to include these SPR's. > diff --git a/arch/powerpc/perf/perf_regs.c b/arch/powerpc/perf/perf_regs.c > index b931eed482c9..51d31b65e423 100644 > --- a/arch/powerpc/perf/perf_regs.c > +++ b/arch/powerpc/perf/perf_regs.c > @@ -90,7 +90,11 @@ static u64 get_ext_regs_value(int idx) > return mfspr(SPRN_SIER2); > case PERF_REG_POWERPC_SIER3: > return mfspr(SPRN_SIER3); > + case PERF_REG_POWERPC_SDAR: > + return mfspr(SPRN_SDAR); > #endif > + case PERF_REG_POWERPC_SIAR: > + return mfspr(SPRN_SIAR); I was initially confused about why SIAR was outside the CONFIG_PPC64 block and SDAR was inside. But it turns out that SIAR is also defined for a 32 bit platform, so that makes sense. I'm not an expert on how the perf subsystem works, but this all seems consistent with the surrounding code and it seems to do what the commit message says, so on that limited basis: Reviewed-by: Daniel Axtens <dja@axtens.net> Kind regards, Daniel
diff --git a/arch/powerpc/include/uapi/asm/perf_regs.h b/arch/powerpc/include/uapi/asm/perf_regs.h index fb1d8a9b4393..e2917710fdab 100644 --- a/arch/powerpc/include/uapi/asm/perf_regs.h +++ b/arch/powerpc/include/uapi/asm/perf_regs.h @@ -61,17 +61,19 @@ enum perf_event_powerpc_regs { PERF_REG_POWERPC_PMC4, PERF_REG_POWERPC_PMC5, PERF_REG_POWERPC_PMC6, + PERF_REG_POWERPC_SDAR, + PERF_REG_POWERPC_SIAR, /* Max mask value for interrupt regs w/o extended regs */ PERF_REG_POWERPC_MAX = PERF_REG_POWERPC_MMCRA + 1, /* Max mask value for interrupt regs including extended regs */ - PERF_REG_EXTENDED_MAX = PERF_REG_POWERPC_PMC6 + 1, + PERF_REG_EXTENDED_MAX = PERF_REG_POWERPC_SIAR + 1, }; #define PERF_REG_PMU_MASK ((1ULL << PERF_REG_POWERPC_MAX) - 1) /* * PERF_REG_EXTENDED_MASK value for CPU_FTR_ARCH_300 - * includes 9 SPRS from MMCR0 to PMC6 excluding the + * includes 11 SPRS from MMCR0 to SIAR excluding the * unsupported SPRS MMCR3, SIER2 and SIER3. */ #define PERF_REG_PMU_MASK_300 \ @@ -79,11 +81,12 @@ enum perf_event_powerpc_regs { (1ul << PERF_REG_POWERPC_MMCR2) | (1ul << PERF_REG_POWERPC_PMC1) | \ (1ul << PERF_REG_POWERPC_PMC2) | (1ul << PERF_REG_POWERPC_PMC3) | \ (1ul << PERF_REG_POWERPC_PMC4) | (1ul << PERF_REG_POWERPC_PMC5) | \ - (1ul << PERF_REG_POWERPC_PMC6)) + (1ul << PERF_REG_POWERPC_PMC6) | (1ul << PERF_REG_POWERPC_SDAR) | \ + (1ul << PERF_REG_POWERPC_SIAR)) /* * PERF_REG_EXTENDED_MASK value for CPU_FTR_ARCH_31 - * includes 12 SPRs from MMCR0 to PMC6. + * includes 14 SPRs from MMCR0 to SIAR. */ #define PERF_REG_PMU_MASK_31 \ (PERF_REG_PMU_MASK_300 | (1ul << PERF_REG_POWERPC_MMCR3) | \ diff --git a/arch/powerpc/perf/perf_regs.c b/arch/powerpc/perf/perf_regs.c index b931eed482c9..51d31b65e423 100644 --- a/arch/powerpc/perf/perf_regs.c +++ b/arch/powerpc/perf/perf_regs.c @@ -90,7 +90,11 @@ static u64 get_ext_regs_value(int idx) return mfspr(SPRN_SIER2); case PERF_REG_POWERPC_SIER3: return mfspr(SPRN_SIER3); + case PERF_REG_POWERPC_SDAR: + return mfspr(SPRN_SDAR); #endif + case PERF_REG_POWERPC_SIAR: + return mfspr(SPRN_SIAR); default: return 0; } }
Patch adds support to include Sampled Instruction Address Register (SIAR) and Sampled Data Address Register (SDAR) SPRs as part of extended registers. Update the definition of PERF_REG_PMU_MASK_300/31 and PERF_REG_EXTENDED_MAX to include these SPR's. Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com> --- arch/powerpc/include/uapi/asm/perf_regs.h | 11 +++++++---- arch/powerpc/perf/perf_regs.c | 4 ++++ 2 files changed, 11 insertions(+), 4 deletions(-)