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[75.142.250.213]) by smtp.gmail.com with ESMTPSA id x199sm1954310oif.5.2021.06.08.14.24.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Jun 2021 14:24:11 -0700 (PDT) From: trix@redhat.com To: mdf@kernel.org, robh+dt@kernel.org, hao.wu@intel.com, corbet@lwn.net, fbarrat@linux.ibm.com, ajd@linux.ibm.com, bbrezillon@kernel.org, arno@natisbad.org, schalla@marvell.com, herbert@gondor.apana.org.au, davem@davemloft.net, gregkh@linuxfoundation.org, Sven.Auhagen@voleatech.de, grandmaster@al2klimov.de Subject: [PATCH 04/11] crypto: marvell: cesa: change FPGA indirect article to an Date: Tue, 8 Jun 2021 14:23:43 -0700 Message-Id: <20210608212350.3029742-6-trix@redhat.com> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210608212350.3029742-1-trix@redhat.com> References: <20210608212350.3029742-1-trix@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=trix@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-doc@vger.kernel.org, Tom Rix , linux-fpga@vger.kernel.org, linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" From: Tom Rix Change use of 'a fpga' to 'an fpga' Signed-off-by: Tom Rix --- drivers/crypto/marvell/cesa/cesa.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/marvell/cesa/cesa.h b/drivers/crypto/marvell/cesa/cesa.h index c1007f2ba79c8..d215a6bed6bc7 100644 --- a/drivers/crypto/marvell/cesa/cesa.h +++ b/drivers/crypto/marvell/cesa/cesa.h @@ -66,7 +66,7 @@ #define CESA_SA_ST_ACT_1 BIT(1) /* - * CESA_SA_FPGA_INT_STATUS looks like a FPGA leftover and is documented only + * CESA_SA_FPGA_INT_STATUS looks like an FPGA leftover and is documented only * in Errata 4.12. It looks like that it was part of an IRQ-controller in FPGA * and someone forgot to remove it while switching to the core and moving to * CESA_SA_INT_STATUS.