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Thu, 15 Apr 2021 23:10:01 +0000 (GMT) Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6A839112063; Thu, 15 Apr 2021 23:09:59 +0000 (GMT) Received: from farosas.linux.ibm.com.com (unknown [9.211.84.45]) by b01ledav004.gho.pok.ibm.com (Postfix) with ESMTP; Thu, 15 Apr 2021 23:09:59 +0000 (GMT) From: Fabiano Rosas To: kvm-ppc@vger.kernel.org Subject: [PATCH v3 2/2] KVM: PPC: Book3S HV: Stop forwarding all HFSCR cause bits to L1 Date: Thu, 15 Apr 2021 20:09:48 -0300 Message-Id: <20210415230948.3563415-3-farosas@linux.ibm.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210415230948.3563415-1-farosas@linux.ibm.com> References: <20210415230948.3563415-1-farosas@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: hFyaHsjNUp8Nxs_DPmBrZf17ocvkgU-M X-Proofpoint-ORIG-GUID: v2SqktxZPeX_4ruGhls6sJuwX0sP6b8q X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-04-15_10:2021-04-15, 2021-04-15 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 mlxlogscore=999 spamscore=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 phishscore=0 bulkscore=0 adultscore=0 mlxscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104060000 definitions=main-2104150142 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linuxppc-dev@lists.ozlabs.org, npiggin@gmail.com Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Since commit 73937deb4b2d ("KVM: PPC: Book3S HV: Sanitise hv_regs on nested guest entry") we have been disabling for the nested guest the hypervisor facility bits that its nested hypervisor don't have access to. If the nested guest tries to use one of those facilities, the hardware will cause a Hypervisor Facility Unavailable interrupt. The HFSCR register is modified by the hardware to contain information about the cause of the interrupt. We have been returning the cause bits to the nested hypervisor but since commit 549e29b458c5 ("KVM: PPC: Book3S HV: Sanitise vcpu registers in nested path") we are reducing the amount of information exposed to L1, so it seems like a good idea to restrict some of the cause bits as well. With this patch the L1 guest will be allowed to handle only the interrupts caused by facilities it has disabled for L2. The interrupts caused by facilities that L0 denied will cause a Program Interrupt in L1. Signed-off-by: Fabiano Rosas --- arch/powerpc/kvm/book3s_hv_nested.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/powerpc/kvm/book3s_hv_nested.c b/arch/powerpc/kvm/book3s_hv_nested.c index 270552dd42c5..912a2bcdf7b0 100644 --- a/arch/powerpc/kvm/book3s_hv_nested.c +++ b/arch/powerpc/kvm/book3s_hv_nested.c @@ -138,6 +138,23 @@ static void save_hv_return_state(struct kvm_vcpu *vcpu, int trap, case BOOK3S_INTERRUPT_H_EMUL_ASSIST: hr->heir = vcpu->arch.emul_inst; break; + case BOOK3S_INTERRUPT_H_FAC_UNAVAIL: + { + u8 cause = vcpu->arch.hfscr >> 56; + + WARN_ON_ONCE(cause >= BITS_PER_LONG); + + if (hr->hfscr & (1UL << cause)) { + hr->hfscr &= ~HFSCR_INTR_CAUSE; + /* + * We have not restored L1 state yet, so queue + * this interrupt instead of delivering it + * immediately. + */ + kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_PROGRAM); + } + break; + } } }