diff mbox series

[1/2] powerpc: dt_cpu_ftrs: Set current thread fscr bits

Message ID 20200423044057.5517-1-alistair@popple.id.au (mailing list archive)
State Superseded
Headers show
Series [1/2] powerpc: dt_cpu_ftrs: Set current thread fscr bits | expand

Checks

Context Check Description
snowpatch_ozlabs/apply_patch success Successfully applied on branch powerpc/merge (8299da600ad05b8aa0f15ec0f5f03bd40e37d6f0)
snowpatch_ozlabs/checkpatch success total: 0 errors, 0 warnings, 0 checks, 14 lines checked
snowpatch_ozlabs/needsstable success Patch has no Fixes tags

Commit Message

Alistair Popple April 23, 2020, 4:40 a.m. UTC
Setting the FSCR bit directly in the SPR only sets it for the initial
boot and early init of the kernel. When the init process is started it
gets copied from the current thread_struct which does not reflect any
changes made during CPU feature detection. This patch ensures the
current thread_struct state is updated to match FSCR after feature
detection is complete.

Signed-off-by: Alistair Popple <alistair@popple.id.au>
---
 arch/powerpc/kernel/dt_cpu_ftrs.c | 2 ++
 1 file changed, 2 insertions(+)
diff mbox series

Patch

diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c b/arch/powerpc/kernel/dt_cpu_ftrs.c
index 36bc0d5c4f3a..dede8f0b678f 100644
--- a/arch/powerpc/kernel/dt_cpu_ftrs.c
+++ b/arch/powerpc/kernel/dt_cpu_ftrs.c
@@ -169,6 +169,7 @@  static int __init feat_try_enable_unknown(struct dt_cpu_feature *f)
 		u64 fscr = mfspr(SPRN_FSCR);
 		fscr |= 1UL << f->fscr_bit_nr;
 		mtspr(SPRN_FSCR, fscr);
+		current->thread.fscr |= 1UL << f->fscr_bit_nr;
 	} else {
 		/* Does not have a known recipe */
 		return 0;
@@ -204,6 +205,7 @@  static int __init feat_enable(struct dt_cpu_feature *f)
 			u64 fscr = mfspr(SPRN_FSCR);
 			fscr |= 1UL << f->fscr_bit_nr;
 			mtspr(SPRN_FSCR, fscr);
+			current->thread.fscr |= 1UL << f->fscr_bit_nr;
 		}
 	}