Message ID | 20191118112324.22725-46-linux@rasmusvillemoes.dk (mailing list archive) |
---|---|
State | Not Applicable |
Headers | show |
Series | QUICC Engine support on ARM, ARM64, PPC64 | expand |
Context | Check | Description |
---|---|---|
snowpatch_ozlabs/apply_patch | success | Successfully applied on branch powerpc/merge (784eee1cc44801366d4f197e0ade7739ee8e1e83) |
snowpatch_ozlabs/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 10 lines checked |
snowpatch_ozlabs/needsstable | success | Patch has no Fixes tags |
On Mon, Nov 18, 2019 at 5:26 AM Rasmus Villemoes <linux@rasmusvillemoes.dk> wrote: > Hi David, What do you think about the patch 45-47 from the series for net related changes? If it is ok with you, I can merge them with the whole series through the soc tree with your ACK. Regards, Leo > When releasing the allocated muram resource, we rely on reading back > the offsets from the riptr/tiptr registers. But those registers are > __be16 (and we indeed write them using iowrite16be), so we can't just > read them back with a normal C dereference. > > This is not currently a real problem, since for now the driver is > PPC32-only. But it will soon be allowed to be used on arm and arm64 as > well. > > Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> > --- > drivers/net/wan/fsl_ucc_hdlc.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/net/wan/fsl_ucc_hdlc.c b/drivers/net/wan/fsl_ucc_hdlc.c > index 405b24a5a60d..8d13586bb774 100644 > --- a/drivers/net/wan/fsl_ucc_hdlc.c > +++ b/drivers/net/wan/fsl_ucc_hdlc.c > @@ -732,8 +732,8 @@ static int uhdlc_open(struct net_device *dev) > > static void uhdlc_memclean(struct ucc_hdlc_private *priv) > { > - qe_muram_free(priv->ucc_pram->riptr); > - qe_muram_free(priv->ucc_pram->tiptr); > + qe_muram_free(ioread16be(&priv->ucc_pram->riptr)); > + qe_muram_free(ioread16be(&priv->ucc_pram->tiptr)); > > if (priv->rx_bd_base) { > dma_free_coherent(priv->dev, > -- > 2.23.0 >
diff --git a/drivers/net/wan/fsl_ucc_hdlc.c b/drivers/net/wan/fsl_ucc_hdlc.c index 405b24a5a60d..8d13586bb774 100644 --- a/drivers/net/wan/fsl_ucc_hdlc.c +++ b/drivers/net/wan/fsl_ucc_hdlc.c @@ -732,8 +732,8 @@ static int uhdlc_open(struct net_device *dev) static void uhdlc_memclean(struct ucc_hdlc_private *priv) { - qe_muram_free(priv->ucc_pram->riptr); - qe_muram_free(priv->ucc_pram->tiptr); + qe_muram_free(ioread16be(&priv->ucc_pram->riptr)); + qe_muram_free(ioread16be(&priv->ucc_pram->tiptr)); if (priv->rx_bd_base) { dma_free_coherent(priv->dev,
When releasing the allocated muram resource, we rely on reading back the offsets from the riptr/tiptr registers. But those registers are __be16 (and we indeed write them using iowrite16be), so we can't just read them back with a normal C dereference. This is not currently a real problem, since for now the driver is PPC32-only. But it will soon be allowed to be used on arm and arm64 as well. Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> --- drivers/net/wan/fsl_ucc_hdlc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)