diff mbox series

[v2,06/23] soc: fsl: qe: avoid tail comments in qe_ic.h

Message ID 20191025124058.22580-7-linux@rasmusvillemoes.dk (mailing list archive)
State Not Applicable
Headers show
Series [v2,01/23] soc: fsl: qe: remove space-before-tab | expand

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snowpatch_ozlabs/apply_patch success Successfully applied on branch powerpc/merge (6b450d0404ca83dc131dadffd40c5aa6f7a603af)
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snowpatch_ozlabs/apply_patch success Successfully applied on branch powerpc/merge (6b450d0404ca83dc131dadffd40c5aa6f7a603af)
snowpatch_ozlabs/checkpatch success total: 0 errors, 0 warnings, 0 checks, 25 lines checked
snowpatch_ozlabs/apply_patch success Successfully applied on branch powerpc/merge (6b450d0404ca83dc131dadffd40c5aa6f7a603af)
snowpatch_ozlabs/checkpatch success total: 0 errors, 0 warnings, 0 checks, 25 lines checked
snowpatch_ozlabs/apply_patch success Successfully applied on branch powerpc/merge (6b450d0404ca83dc131dadffd40c5aa6f7a603af)
snowpatch_ozlabs/checkpatch success total: 0 errors, 0 warnings, 0 checks, 25 lines checked
snowpatch_ozlabs/apply_patch success Successfully applied on branch powerpc/merge (6b450d0404ca83dc131dadffd40c5aa6f7a603af)
snowpatch_ozlabs/checkpatch success total: 0 errors, 0 warnings, 0 checks, 25 lines checked

Commit Message

Rasmus Villemoes Oct. 25, 2019, 12:40 p.m. UTC 
This is consistent with normal kernel coding style and the style used
in the struct definition above this one.

Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
---
 drivers/soc/fsl/qe/qe_ic.h | 19 ++++++++++++++-----
 1 file changed, 14 insertions(+), 5 deletions(-)
diff mbox series

Patch

diff --git a/drivers/soc/fsl/qe/qe_ic.h b/drivers/soc/fsl/qe/qe_ic.h
index 9420378d9b6b..29b4d768e4a8 100644
--- a/drivers/soc/fsl/qe/qe_ic.h
+++ b/drivers/soc/fsl/qe/qe_ic.h
@@ -89,11 +89,20 @@  struct qe_ic {
  * QE interrupt controller internal structure
  */
 struct qe_ic_info {
-	u32	mask;	  /* location of this source at the QIMR register. */
-	u32	mask_reg; /* Mask register offset */
-	u8	pri_code; /* for grouped interrupts sources - the interrupt
-			     code as appears at the group priority register */
-	u32	pri_reg;  /* Group priority register offset */
+	/* Location of this source at the QIMR register */
+	u32	mask;
+
+	/* Mask register offset */
+	u32	mask_reg;
+
+	/*
+	 * For grouped interrupts sources - the interrupt code as
+	 * appears at the group priority register
+	 */
+	u8	pri_code;
+
+	/* Group priority register offset */
+	u32	pri_reg;
 };
 
 #endif /* _POWERPC_SYSDEV_QE_IC_H */