From patchwork Tue Feb 20 00:22:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cyril Bur X-Patchwork-Id: 875347 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3zlhRB01Vpz9ryl for ; Tue, 20 Feb 2018 11:32:54 +1100 (AEDT) Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3zlhR96Bs0zF19n for ; Tue, 20 Feb 2018 11:32:53 +1100 (AEDT) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=softfail (mailfrom) smtp.mailfrom=gmail.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=cyrilbur@gmail.com; receiver=) Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3zlhCt0YT3zDrF6 for ; Tue, 20 Feb 2018 11:23:05 +1100 (AEDT) Received: from pps.filterd (m0098416.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w1K0JTjs001719 for ; Mon, 19 Feb 2018 19:23:04 -0500 Received: from e06smtp11.uk.ibm.com (e06smtp11.uk.ibm.com [195.75.94.107]) by mx0b-001b2d01.pphosted.com with ESMTP id 2g84k90ntv-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Mon, 19 Feb 2018 19:23:03 -0500 Received: from localhost by e06smtp11.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 20 Feb 2018 00:23:00 -0000 Received: from d06av26.portsmouth.uk.ibm.com (d06av26.portsmouth.uk.ibm.com [9.149.105.62]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w1K0MxDd66257082; Tue, 20 Feb 2018 00:22:59 GMT Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D9E26AE04D; Tue, 20 Feb 2018 00:13:55 +0000 (GMT) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2E64BAE045; Tue, 20 Feb 2018 00:13:55 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP; Tue, 20 Feb 2018 00:13:55 +0000 (GMT) Received: from camb691.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher DHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 04C46A03A5; Tue, 20 Feb 2018 11:22:56 +1100 (AEDT) From: Cyril Bur To: mikey@neuling.org, benh@kernel.crashing.org, linuxppc-dev@lists.ozlabs.org Subject: [RFC PATCH 07/12] [WIP] powerpc/tm: Add TM_KERNEL_ENTRY in more delicate exception pathes Date: Tue, 20 Feb 2018 11:22:36 +1100 X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180220002241.29648-1-cyrilbur@gmail.com> References: <20180220002241.29648-1-cyrilbur@gmail.com> X-TM-AS-GCONF: 00 x-cbid: 18022000-0040-0000-0000-0000043565E3 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18022000-0041-0000-0000-000020D77369 Message-Id: <20180220002241.29648-8-cyrilbur@gmail.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-19_10:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1034 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802200002 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" --- arch/powerpc/kernel/entry_64.S | 15 ++++++++++++++- arch/powerpc/kernel/exceptions-64s.S | 31 ++++++++++++++++++++++++++++--- 2 files changed, 42 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S index 107c15c6f48b..32e8d8f7e091 100644 --- a/arch/powerpc/kernel/entry_64.S +++ b/arch/powerpc/kernel/entry_64.S @@ -967,7 +967,20 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR) bl __check_irq_replay cmpwi cr0,r3,0 beq .Lrestore_no_replay - + + /* + * We decide VERY late if we need to replay interrupts, theres + * not much which can be done about that so this will have to + * do + */ + TM_KERNEL_ENTRY + /* + * This will restore r3 that TM_KERNEL_ENTRY clobbered. + * Clearly not ideal! I wonder if we could change the trap + * value beforehand... + */ + bl __check_irq_replay + /* * We need to re-emit an interrupt. We do so by re-using our * existing exception frame. We first change the trap value, diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index 3ac87e53b3da..c8899bf77fb0 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -504,6 +504,11 @@ EXC_COMMON_BEGIN(data_access_common) li r5,0x300 std r3,_DAR(r1) std r4,_DSISR(r1) + /* + * Can't do TM_KERNEL_ENTRY here as do_hash_page might jump to + * very late in the expection exit code, well after any + * possiblity of doing a recheckpoint + */ BEGIN_MMU_FTR_SECTION b do_hash_page /* Try to handle as hpte fault */ MMU_FTR_SECTION_ELSE @@ -548,6 +553,11 @@ EXC_COMMON_BEGIN(instruction_access_common) li r5,0x400 std r3,_DAR(r1) std r4,_DSISR(r1) + /* + * Can't do TM_KERNEL_ENTRY here as do_hash_page might jump to + * very late in the expection exit code, well after any + * possiblity of doing a recheckpoint + */ BEGIN_MMU_FTR_SECTION b do_hash_page /* Try to handle as hpte fault */ MMU_FTR_SECTION_ELSE @@ -761,6 +771,7 @@ EXC_COMMON_BEGIN(alignment_common) std r4,_DSISR(r1) bl save_nvgprs RECONCILE_IRQ_STATE(r10, r11) + TM_KERNEL_ENTRY addi r3,r1,STACK_FRAME_OVERHEAD bl alignment_exception b ret_from_except @@ -1668,7 +1679,9 @@ do_hash_page: /* Here we have a page fault that hash_page can't handle. */ handle_page_fault: -11: andis. r0,r4,DSISR_DABRMATCH@h +11: TM_KERNEL_ENTRY + ld r4,_DSISR(r1) + andis. r0,r4,DSISR_DABRMATCH@h bne- handle_dabr_fault ld r4,_DAR(r1) ld r5,_DSISR(r1) @@ -1685,6 +1698,10 @@ handle_page_fault: /* We have a data breakpoint exception - handle it */ handle_dabr_fault: + /* + * Don't need to do TM_KERNEL_ENTRY here as we'll + * come from handle_page_fault: which has done it already + */ bl save_nvgprs ld r4,_DAR(r1) ld r5,_DSISR(r1) @@ -1698,7 +1715,14 @@ handle_dabr_fault: * the PTE insertion */ 13: bl save_nvgprs - mr r5,r3 + /* + * Use a non-volatile as the TM code will call, r3 is the + * return value from __hash_page() so not exactly easy to get + * again. + */ + mr r31,r3 + TM_KERNEL_ENTRY + mr r5, r31 addi r3,r1,STACK_FRAME_OVERHEAD ld r4,_DAR(r1) bl low_hash_fault @@ -1713,7 +1737,8 @@ handle_dabr_fault: * the access, or panic if there isn't a handler. */ 77: bl save_nvgprs - mr r4,r3 + TM_KERNEL_ENTRY + ld r4,_DAR(r1) addi r3,r1,STACK_FRAME_OVERHEAD li r5,SIGSEGV bl bad_page_fault